公开(公告)号：US12249489B2

公开(公告)日：2025-03-11

申请号：US18131997

申请日：2023-04-07

Applicant: Applied Materials, Inc.

Inventor： Yue Chen ,  Jinyu Lu ,  Yongmei Chen ,  Jinxin Fu ,  Zihao Yang ,  Mingwei Zhu ,  Takashi Kuratomi ,  Rami Hourani ,  Ludovic Godet ,  Qun Jing ,  Jingyi Yang ,  David Masayuki Ishikawa

IPC: H01J37/32 ,  H01J7/02

Abstract: A method of processing an optical device is provided, including: positioning an optical device on a substrate support in an interior volume of a process chamber, the optical device including an optical device substrate and a plurality of optical device structures formed over the optical device substrate, each optical device structure including a bulk region formed of silicon carbide and one or more surface regions formed of silicon oxycarbide. The method further includes providing one or more process gases to the interior volume of the process chamber, and generating a plasma of the one or more process gases in the interior volume for a first time period when the optical device is on the substrate support, and stopping the plasma after the first time period. A carbon content of the one or more surface regions of each optical device structure is reduced by at least 50% by the plasma.

公开(公告)号：US11145504B2

公开(公告)日：2021-10-12

申请号：US16597466

申请日：2019-10-09

Applicant: Applied Materials, Inc.

Inventor： Zhijun Jiang ,  Ganesh Balasubramanian ,  Arkajit Roy Barman ,  Hidehiro Kojiri ,  Xinhai Han ,  Deenesh Padhi ,  Chuan Ying Wang ,  Yue Chen ,  Daemian Raj Benjamin Raj ,  Nikhil Sudhindrarao Jorapur ,  Vu Ngoc Tran Nguyen ,  Miguel S. Fung ,  Jose Angelo Olave ,  Thian Choi Lim

IPC: H01L21/02 ,  H01L21/67 ,  C23C16/44 ,  C23C16/24 ,  C23C16/40

Abstract: A method of forming a film stack with reduced defects is provided and includes positioning a substrate on a substrate support within a processing chamber and sequentially depositing polysilicon layers and silicon oxide layers to produce the film stack on the substrate. The method also includes supplying a current of greater than 5 ampere (A) to a plasma profile modulator while generating a deposition plasma within the processing chamber, exposing the substrate to the deposition plasma while depositing the polysilicon layers and the silicon oxide layers, and maintaining the processing chamber at a pressure of greater than 2 Torr to about 100 Torr while depositing the polysilicon layers and the silicon oxide layers.

公开(公告)号：US12094689B2

公开(公告)日：2024-09-17

申请号：US16932794

申请日：2020-07-19

Applicant: Applied Materials, Inc.

Inventor： Sai Susmita Addepalli ,  Yue Chen ,  Abhigyan Keshri ,  Qiang Ma ,  Zhijun Jiang ,  Shailendra Srivastava ,  Daemian Raj Benjamin Raj ,  Ganesh Balasubramanian

IPC: H01J37/32 ,  C23C16/40 ,  C23C16/44 ,  C23C16/50 ,  H01L21/67

CPC classification number: H01J37/32449 ,  C23C16/401 ,  C23C16/4412 ,  C23C16/50 ,  H01J37/32357 ,  H01J2237/332 ,  H01J2237/334 ,  H01L21/67069

Abstract: Exemplary semiconductor processing systems may include a processing chamber including a lid stack having an output manifold. The systems may include a gas panel. The systems may include an input manifold. The input manifold may fluidly couple the gas panel with the output manifold of the processing chamber. A delivery line may extend from the input manifold to the output manifold. The systems may include a first transmission line extending from a first set of precursor sources of the gas panel to the delivery line. The systems may include a second transmission line extending from a second set of precursor sources of the gas panel to the delivery line. The second transmission line may be switchably coupled between the delivery line and an exhaust of the semiconductor processing system.

公开(公告)号：US20210047730A1

公开(公告)日：2021-02-18

申请号：US16986438

申请日：2020-08-06

Applicant: Applied Materials, Inc.

Inventor： Sai Susmita Addepalli ,  Yue Chen ,  Zhijun Jiang ,  Shailendra Srivastava ,  Nikhil Sudhindrarao Jorapur ,  Daemian Raj Benjamin Raj ,  Greg Chichkanoff ,  Qiang Ma ,  Abhigyan Keshri ,  Xinhai Han ,  Ganesh Balasubramanian ,  Deenesh Padhi

IPC: C23C16/458 ,  H01L21/02 ,  H01J37/32 ,  C23C16/455 ,  C23C16/52

Abstract: Exemplary semiconductor processing chambers may include a showerhead. The chambers may also include a substrate support characterized by a first surface facing the showerhead. The first surface may be configured to support a semiconductor substrate. The substrate support may define a recessed pocket centrally located within the first surface. The recessed pocket may be defined by an outer radial wall characterized by a height from the first surface within the recessed pocket that is greater than or about 150% of a thickness of the semiconductor substrate.

公开(公告)号：US20220020570A1

公开(公告)日：2022-01-20

申请号：US16932794

申请日：2020-07-19

Applicant: Applied Materials, Inc.

Inventor： Sai Susmita Addepalli ,  Yue Chen ,  Abhigyan Keshri ,  Qiang Ma ,  Zhijun Jiang ,  Shailendra Srivastava ,  Daemian Raj Benjamin Raj ,  Ganesh Balasubramanian

IPC: H01J37/32 ,  C23C16/50 ,  C23C16/40 ,  C23C16/44

Abstract: Exemplary semiconductor processing systems may include a processing chamber including a lid stack having an output manifold. The systems may include a gas panel. The systems may include an input manifold. The input manifold may fluidly couple the gas panel with the output manifold of the processing chamber. A delivery line may extend from the input manifold to the output manifold. The systems may include a first transmission line extending from a first set of precursor sources of the gas panel to the delivery line. The systems may include a second transmission line extending from a second set of precursor sources of the gas panel to the delivery line. The second transmission line may be switchably coupled between the delivery line and an exhaust of the semiconductor processing system.