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公开(公告)号:US12205671B2
公开(公告)日:2025-01-21
申请号:US17815273
申请日:2022-07-27
Applicant: GlobalFoundries U.S. Inc.
Inventor: Xiaoli Hu , Xiaoxiao Li , Wei Zhao , Yuqing Sun , Xueqiang Dai , Xiaohua Cheng
Abstract: Embodiments of the disclosure provide a circuit structure and related method to compensate for sense amplifier leakage. A circuit structure according to the disclosure includes a reference voltage generator coupling a supply voltage and a reference line to a sense amplifier. A multiplexer within the reference voltage generator is coupled to the reference line. The multiplexer includes a plurality of transistors each having a gate terminal coupled to ground.
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公开(公告)号:US11475926B1
公开(公告)日:2022-10-18
申请号:US17344133
申请日:2021-06-10
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Xiaoxiao Li , Xiaoli Hu , Shuangdi Zhao , Xi Cao , Wei Zhao , Xueqiang Dai
Abstract: The present disclosure relates to integrated circuits, and more particularly, to a sense amplifier circuit for current sensing in a memory structure and methods of manufacture and operation. In particular, the present disclosure relates to a circuit including: a sensing circuit including a first set of transistors, at least one data cell circuit, and a reference cell circuit; a reference voltage holding circuit comprising a second set of transistors and a bitline capacitor; and a comparator differential circuit which receives a data sensing voltage signal from the sensing circuit and a reference voltage level from the reference voltage holding circuit and outputs an output signal.
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公开(公告)号:US20240038283A1
公开(公告)日:2024-02-01
申请号:US17815273
申请日:2022-07-27
Applicant: GlobalFoundries U.S. Inc.
Inventor: Xiaoli Hu , Xiaoxiao Li , Wei Zhao , Yuqing Sun , Xueqiang Dai , Xiaohua Cheng
Abstract: Embodiments of the disclosure provide a circuit structure and related method to compensate for sense amplifier leakage. A circuit structure according to the disclosure includes a reference voltage generator coupling a supply voltage and a reference line to a sense amplifier. A multiplexer within the reference voltage generator is coupled to the reference line. The multiplexer includes a plurality of transistors each having a gate terminal coupled to ground.
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