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公开(公告)号:US20230402091A1
公开(公告)日:2023-12-14
申请号:US17806792
申请日:2022-06-14
Applicant: GlobalFoundries U.S. Inc.
Inventor: Venkatesh P. Gopinath , Xiaoli Hu , Thomas Melde , Nicki N. Mika
IPC: G11C11/4099 , G11C11/4091 , G11C11/4094 , G11C11/4097 , G11C11/56
CPC classification number: G11C11/4099 , G11C11/4091 , G11C11/4094 , G11C11/4097 , G11C11/5635
Abstract: Structures herein include an array of non-volatile memory cells. The non-volatile memory cells include memory bit cells and at least one reference bit cell that is adjacent the memory bit cells. These structures also include at least one reference voltage regulator connected to the reference bit cell, and at least one sense amplifier connected to the memory bit cells and the reference voltage regulator.
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公开(公告)号:US20240023345A1
公开(公告)日:2024-01-18
申请号:US17866756
申请日:2022-07-18
Applicant: GlobalFoundries U.S. Inc.
Inventor: Venkatesh Gopinath , Bipul C. Paul , Xiaoli Hu
CPC classification number: H01L27/2472 , H01L27/2454 , G11C13/0026 , G11C13/0028 , G11C13/0069 , H01L45/1206
Abstract: Structures that include resistive memory elements and methods of forming a structure that includes resistive memory elements. The structure comprises a first plurality of resistive memory elements including a first plurality of bottom electrodes, a first top electrode, and a first switching layer between the first top electrode and the first plurality of bottom electrodes. The structure further comprises a second plurality of resistive memory elements including a second plurality of bottom electrodes, a second top electrode, and a second switching layer between the second top electrode and the second plurality of bottom electrodes. The first top electrode is shared by the first plurality of resistive memory elements, and the second top electrode is shared by the second plurality of resistive memory elements.
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公开(公告)号:US11475926B1
公开(公告)日:2022-10-18
申请号:US17344133
申请日:2021-06-10
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Xiaoxiao Li , Xiaoli Hu , Shuangdi Zhao , Xi Cao , Wei Zhao , Xueqiang Dai
Abstract: The present disclosure relates to integrated circuits, and more particularly, to a sense amplifier circuit for current sensing in a memory structure and methods of manufacture and operation. In particular, the present disclosure relates to a circuit including: a sensing circuit including a first set of transistors, at least one data cell circuit, and a reference cell circuit; a reference voltage holding circuit comprising a second set of transistors and a bitline capacitor; and a comparator differential circuit which receives a data sensing voltage signal from the sensing circuit and a reference voltage level from the reference voltage holding circuit and outputs an output signal.
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公开(公告)号:US12205633B2
公开(公告)日:2025-01-21
申请号:US17806792
申请日:2022-06-14
Applicant: GlobalFoundries U.S. Inc.
Inventor: Venkatesh P. Gopinath , Xiaoli Hu , Thomas Melde , Nicki N. Mika
IPC: G11C11/4099 , G11C11/4091 , G11C11/4094 , G11C11/4097 , G11C11/56
Abstract: Structures herein include an array of non-volatile memory cells. The non-volatile memory cells include memory bit cells and at least one reference bit cell that is adjacent the memory bit cells. These structures also include at least one reference voltage regulator connected to the reference bit cell, and at least one sense amplifier connected to the memory bit cells and the reference voltage regulator.
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公开(公告)号:US20240038283A1
公开(公告)日:2024-02-01
申请号:US17815273
申请日:2022-07-27
Applicant: GlobalFoundries U.S. Inc.
Inventor: Xiaoli Hu , Xiaoxiao Li , Wei Zhao , Yuqing Sun , Xueqiang Dai , Xiaohua Cheng
Abstract: Embodiments of the disclosure provide a circuit structure and related method to compensate for sense amplifier leakage. A circuit structure according to the disclosure includes a reference voltage generator coupling a supply voltage and a reference line to a sense amplifier. A multiplexer within the reference voltage generator is coupled to the reference line. The multiplexer includes a plurality of transistors each having a gate terminal coupled to ground.
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公开(公告)号:US12205671B2
公开(公告)日:2025-01-21
申请号:US17815273
申请日:2022-07-27
Applicant: GlobalFoundries U.S. Inc.
Inventor: Xiaoli Hu , Xiaoxiao Li , Wei Zhao , Yuqing Sun , Xueqiang Dai , Xiaohua Cheng
Abstract: Embodiments of the disclosure provide a circuit structure and related method to compensate for sense amplifier leakage. A circuit structure according to the disclosure includes a reference voltage generator coupling a supply voltage and a reference line to a sense amplifier. A multiplexer within the reference voltage generator is coupled to the reference line. The multiplexer includes a plurality of transistors each having a gate terminal coupled to ground.
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