公开(公告)号：US20250078913A1

公开(公告)日：2025-03-06

申请号：US18459530

申请日：2023-09-01

Applicant: GlobalFoundries U.S. Inc.

Inventor： Xuemei Hui ,  Shafiullah Syed ,  Qiao Yang ,  Wei Zhao

IPC: G11C11/412 ,  G11C11/419 ,  H10B10/00

Abstract: A static random access memory (SRAM) cell includes P-type and N-type transistors having secondary gates. A node connected to all secondary gates receives a write enable signal (WEN). A low WEN forward biases the P-type transistors and increases the toggle threshold voltage (Vtth) of the SRAM cell to avoid data switching during a read. A high WEN forward biases the N-type transistors and decreases Vtth during a write. The SRAM cell can be implemented using a fully depleted semiconductor-on-insulator technology, where the secondary gates include corresponding portions of a well region below. In this case, an array of SRAM cells can be above a single well region. Alternatively, the array can be sectioned into sub-arrays above different well regions and a decoder can output sub-array-specific WENs to the different well regions (e.g., with only one WEN being high at a given time to reduce capacitance).

公开(公告)号：US12205671B2

公开(公告)日：2025-01-21

申请号：US17815273

申请日：2022-07-27

Applicant: GlobalFoundries U.S. Inc.

Inventor： Xiaoli Hu ,  Xiaoxiao Li ,  Wei Zhao ,  Yuqing Sun ,  Xueqiang Dai ,  Xiaohua Cheng

IPC: G11C7/14 ,  G11C7/06

Abstract: Embodiments of the disclosure provide a circuit structure and related method to compensate for sense amplifier leakage. A circuit structure according to the disclosure includes a reference voltage generator coupling a supply voltage and a reference line to a sense amplifier. A multiplexer within the reference voltage generator is coupled to the reference line. The multiplexer includes a plurality of transistors each having a gate terminal coupled to ground.

公开(公告)号：US11475926B1

公开(公告)日：2022-10-18

申请号：US17344133

申请日：2021-06-10

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Xiaoxiao Li ,  Xiaoli Hu ,  Shuangdi Zhao ,  Xi Cao ,  Wei Zhao ,  Xueqiang Dai

IPC: G11C7/02 ,  G11C7/06 ,  G11C7/08

Abstract: The present disclosure relates to integrated circuits, and more particularly, to a sense amplifier circuit for current sensing in a memory structure and methods of manufacture and operation. In particular, the present disclosure relates to a circuit including: a sensing circuit including a first set of transistors, at least one data cell circuit, and a reference cell circuit; a reference voltage holding circuit comprising a second set of transistors and a bitline capacitor; and a comparator differential circuit which receives a data sensing voltage signal from the sensing circuit and a reference voltage level from the reference voltage holding circuit and outputs an output signal.

公开(公告)号：US20240038283A1

公开(公告)日：2024-02-01

申请号：US17815273

申请日：2022-07-27

Applicant: GlobalFoundries U.S. Inc.

Inventor： Xiaoli Hu ,  Xiaoxiao Li ,  Wei Zhao ,  Yuqing Sun ,  Xueqiang Dai ,  Xiaohua Cheng

IPC: G11C7/14 ,  G11C7/06

CPC classification number: G11C7/14 ,  G11C7/062

Abstract: Embodiments of the disclosure provide a circuit structure and related method to compensate for sense amplifier leakage. A circuit structure according to the disclosure includes a reference voltage generator coupling a supply voltage and a reference line to a sense amplifier. A multiplexer within the reference voltage generator is coupled to the reference line. The multiplexer includes a plurality of transistors each having a gate terminal coupled to ground.