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公开(公告)号：US09543510B2
公开(公告)日：2017-01-10
申请号：US13917681
申请日：2013-06-14
Inventor： Xiangshui Miao , Hao Tong , Xiaomin Cheng
IPC: H01L45/00
CPC classification number: H01L45/06 , H01L45/1226 , H01L45/1233 , H01L45/128 , H01L45/142 , H01L45/143 , H01L45/144 , H01L45/145 , H01L45/148 , H01L45/1608 , H01L45/1625
Abstract: A multi-layer phase change material, including: a multi-layer film structure. The multi-layer film structure includes a plurality of periodic units. The periodic units each includes a first single-layer film phase change material and a second single-layer film phase change material. The first single-layer film phase change material and the second single-layer film phase change material are alternately stacked. The first single-layer film phase change material includes chemical components that are different from chemical components included in the second single-layer film phase change material, or the first single-layer film phase change material includes chemical components that are the same as chemical components included in the second single-layer film phase change material and a percent composition of the chemical components included in the first single-layer film phase change material is different from a percent composition of the chemical components included in the second single-layer film phase change material.
Abstract translation: 一种多层相变材料，包括：多层膜结构。 多层膜结构包括多个周期性单元。 周期性单元各自包括第一单层膜相变材料和第二单层膜相变材料。 第一单层膜相变材料和第二单层膜相变材料交替堆叠。 第一单层膜相变材料包括与第二单层膜相变材料中包含的化学成分不同的化学成分，或者第一单层膜相变材料包含与化学成分相同的化学成分 包含在第二单层膜相变材料中的包含在第一单层膜相变材料中的化学成分的组成百分比与第二单层膜相变中包含的化学成分的组成百分比不同 材料。
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2.发明授权公开(公告)号：US12207574B1
公开(公告)日：2025-01-21
申请号：US18748017
申请日：2024-06-19
Inventor： Xiaomin Cheng , Haobin Li , Yunhao Luo , Xiangshui Miao
Abstract: The disclosure discloses a reconfigurable heterojunction memristor, a control method, a fabrication method, and an application thereof. The functional layer designed by the disclosure comprises a PN heterojunction of n-AgO and p-Ag2O or a PN heterojunction of n-CuO2 and p-CuO. In the analog type, multiple resistance state performance is exhibited based on charge trapping and releasing, and self-rectification characteristics are exhibited, without the need for a selector, which facilitates large-scale integration; in the digital type, the presence of Ag/Cu ions in the layer helps to form Ag/Cu conductive filaments, the switching threshold voltage is small, and the advantages of fast switching speed and low switching power consumption are provided. The disclosure realizes a PN heterojunction device of an N-type oxide layer and a P-type oxide layer through electrochemical principles, and is analog type-digital type reconfigurable between a self-rectifying analog type device and a digital type device.
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公开(公告)号：US12189270B2
公开(公告)日：2025-01-07
申请号：US18577702
申请日：2021-09-07
Inventor： Xiaomin Cheng , Zhuli He , Yunlai Zhu , Han Li , Xiangshui Miao
IPC: G02F3/02 , G11C13/00 , H03K19/173
Abstract: A Y-branch type phase-change all-optical Boolean logic device comprises a waveguide of a Y-branch structure and phase change function units covered over the waveguide. In the logic implementation method, a light pulse having a large power is employed to perform a write operation on the phase change function unit, so that the phase change function unit is heated to generate a crystallization or amorphization phase change, thereby causing a difference in optical properties under two states; the state of the phase change function unit is read by employing a light pulse having a small power, and the state of its phase change material is not changed. By defining input logic signals respectively and defining three operation steps, an operation mode reconfigurable logic can be implemented, and all 16 binary Boolean logic calculations are implemented in a simple structure by means of step-by-step operation.
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4.发明授权公开(公告)号：US11807798B2
公开(公告)日：2023-11-07
申请号：US17928932
申请日：2021-12-22
Inventor： Xiaomin Cheng , Yuntao Zeng , Xiangshui Miao
CPC classification number: C09K5/063 , C23C14/0623 , C23C14/352 , H10B63/10 , H10N70/8828
Abstract: A Cu-doped Sb2Te3 system phase change material, a phase change memory, and a preparation method thereof belonging to the technical field of micro-nano electronics are provided. A Sb—Te system phase change material is doped with Cu element to form Cu3Te2 bonds with both tetrahedral and octahedral structures in the case of local enrichment of Cu. The strongly bonded tetrahedral structure improves the amorphous stability and data retention capability of the Sb—Te system phase change material, and the octahedral structure of the crystal configuration improves the crystallization speed of the Sb—Te system phase change material. A phase change memory including the phase change material and a preparation method of the phase change material are also provided. Through the phase change material provided by the invention, both the speed and amorphous stability of the device are improved, and the comprehensive performance of the phase change memory is also enhanced.
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Patent Agency Ranking
公开(公告)号：US12256651B2
公开(公告)日：2025-03-18
申请号：US17762742
申请日：2020-10-21
Inventor： Xiaomin Cheng , Jinlong Feng , Ming Xu , Meng Xu , Xiangshui Miao
Abstract: A superlattice phase-change thin film with a low density change, a phase-change memory and a preparation method. The superlattice phase-change thin film includes first phase-change layers (7) and second phase-change layers (8) that are alternately stacked to form a periodic structure; during crystallization, the first phase-change layer (7) has a conventional positive density change, and the second phase-change layer (8) has an abnormal negative density change, therefore, the abnormal density reduction and volume increase of the second phase-change layer (8) during crystallization can be used to offset the volume reduction of the first phase-change layer (7) during crystallization.
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公开(公告)号：US12262650B1
公开(公告)日：2025-03-25
申请号：US18760041
申请日：2024-07-01
Inventor： Xiaomin Cheng , Lijuan Cao , Yunhao Luo , Jiaqi Li , Xiangshui Miao
Abstract: Disclosed is a temperature sensing and computing device and array based on TaOx electronic memristor, including a first metal layer, a function layer, and a second metal layer sequentially stacked from bottom to top; a work function of a metal material in the first metal layer is higher than a work function of a metal material in the second metal layer; the function layer is TaOx material; the first metal layer is grounded, and positive and negative voltages are applied to the second metal layer; in which an output current when the negative voltage is applied to the second metal layer is greater than an output current when the positive voltage of the same magnitude is applied to the second metal layer, and there is a self-rectifying effect; when the voltage of the same magnitude is applied to the second metal layer, the output current increases as a temperature increases.
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公开(公告)号：US11906876B2
公开(公告)日：2024-02-20
申请号：US17910835
申请日：2021-07-22
Inventor： Xiaomin Cheng , Zhuli He , Yunlai Zhu , Han Li , Xiangshui Miao
IPC: G02F3/00
CPC classification number: G02F3/00 , G02F2201/307 , G02F2203/11 , G02F2203/50
Abstract: The disclosure provides a straight waveguide phase change all-photonic Boolean logic device and a full binary logic implementation method thereof, including a ridge- shape straight waveguide structure, two phase change functional units near the two ends and a Bragg grating between two phase change functional units. The phase change functional units and Bragg grating are situated on the ridge of the waveguide. The write and read optic pulses have different wavelengths. The Bragg grating are designed to reflect the write optical pulse and transmit the read pulse, so that write pulses input from the two ends only act on the phase change functional unit closest to that end, and read pulse can go through the whole device from input end to output end. In terms of the logic implementation method, with three-step write operation, 16 full Boolean logic functions can be implemented in this device.
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公开(公告)号：US11765987B2
公开(公告)日：2023-09-19
申请号：US17642706
申请日：2021-01-05
Inventor： Xiaomin Cheng , Han Li , Yuntao Zeng , Yunlai Zhu , Xiangjun Liu , Xiangshui Miao
CPC classification number: H10N70/828 , H10N70/066 , H10N70/231 , H10N70/841 , H10N70/8616 , H10N70/8828
Abstract: A phase change memory device based on a nano current channel is provided. A nano current channel layer structure is adopted and configured to limit the current channel. As such, when flowing through the layer, the current enters the phase change layer from nano crystal grains with high electrical conductivity, and the current is thereby confined in the nano current channels. By using the nano-scale conductive channels, the contact area between the phase change layer and the electrode layer is significantly decreased, the current density at local contact channel is significantly increased, and heat generation efficiency of the current in the phase change layer is improved. Moreover, an electrically insulating and heat-insulating material with low electrical conductivity and low thermal conductivity prevents heat in the phase change layer from being dissipated to the electrode layer, and Joule heat utilization efficiency of the phase change layer is thereby improved.
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公开(公告)号：US09369130B2
公开(公告)日：2016-06-14
申请号：US14706004
申请日：2015-05-07
Inventor： Xiangshui Miao , Yi Li , Yingpeng Zhong , Lei Xu , Huajun Sun , Xiaomin Cheng
IPC: H03K19/003 , G11C13/00 , H03K19/173 , H03K19/20 , H03K19/177
CPC classification number: H03K19/00346 , G11C13/0004 , G11C13/004 , H03K19/1733 , H03K19/17724 , H03K19/20
Abstract: A nonvolatile logic gate circuit based on phase change memories, including a first phase change memory, a second phase change memory, a first controllable switch element and a first resistor, wherein a first end of the first phase change memory serves as a first input end of an AND gate circuit, a first end of the second phase change memory serves as a second input end of the AND gate circuit, a first end of the first controllable switch element is connected to a second end of the first phase change memory, a second end of the first controllable switch element is grounded; one end of the first resistor is connected to the first end of the second phase change memory, the other end of the first resistor is grounded; and the first end of the second phase change memory serves as an output end of the AND gate circuit.
Abstract translation: 一种基于相变存储器的非易失性逻辑门电路，包括第一相变存储器，第二相变存储器，第一可控开关元件和第一电阻器，其中第一相变存储器的第一端用作第一输入端 和门电路的第一端，第二相变存储器的第一端用作与门电路的第二输入端，第一可控开关元件的第一端连接到第一相变存储器的第二端， 第一可控开关元件的第二端接地; 第一电阻器的一端连接到第二相变存储器的第一端，第一电阻器的另一端接地; 并且第二相变存储器的第一端用作与门电路的输出端。
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