公开(公告)号：US20150017328A1

公开(公告)日：2015-01-15

申请号：US14331319

申请日：2014-07-15

Applicant: IBIDEN CO., LTD.

Inventor： Takashi Nakane ,  Yoshihiro Nishio ,  Yoshiki Kawai ,  Teruyoshi Hisada ,  Koya Ozeki ,  Mitsutaka Naitoh ,  Yutaka Shichi

IPC: B05B15/08 ,  B05B1/14 ,  B05B7/08 ,  B05B13/06 ,  B05B15/12 ,  B05B1/02 ,  B05B13/02

CPC classification number: B05B13/069 ,  B05B1/02 ,  B05B1/14 ,  B05B13/0221 ,  B05B15/68 ,  B05B16/40 ,  B05B16/95

Abstract: A surface treatment apparatus includes a treatment vessel which contains a treatment solution, a transfer device which transfers a substrate through an interior portion of the treatment vessel in an in-plane direction of the substrate, and a jet device which is positioned in the interior portion of the treatment vessel and jets the treatment solution onto a surface of the substrate such that the surface of the substrate is treated with the treatment solution in the interior portion of the treatment vessel. The jet device has a nozzle hole which jets the treatment solution in a jet direction set parallel or diagonal with respect to the substrate surface.

Abstract translation: 表面处理装置包括含有处理溶液的处理容器，在基板的面内方向上通过处理容器的内部传送基板的转印装置，以及位于内部的喷射装置 并将处理溶液喷射到基板的表面上，使得基板的表面用处理容器内部的处理溶液处理。 喷射装置具有喷嘴孔，其以相对于基板表面平行或对角设置的喷射方向喷射处理溶液。

公开(公告)号：US09603248B2

公开(公告)日：2017-03-21

申请号：US13779944

申请日：2013-02-28

Applicant: IBIDEN CO., LTD.

Inventor： Teruyoshi Hisada ,  Takashi Nakane

IPC: H05K1/11 ,  H05K3/46 ,  H05K3/42

CPC classification number: H05K1/115 ,  H05K3/429 ,  H05K3/4602 ,  H05K3/4652 ,  H05K2201/09509 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09827 ,  H05K2201/09854 ,  H05K2201/09863 ,  H05K2203/0554

Abstract: A wiring board includes a board including a core, a conductive layer on the core, and a laminated structure over the core and conductive layer, and a stacked structure formed in the board and including a through-hole conductor through the core and a via conductor in the laminated structure. The through-hole conductor has though-hole portion through the core and land portion on the core, the laminated structure includes an insulation layer in which the via conductor is formed, the via conductor is stacked on the land portion such that the stacked structure including the through-hole and via conductors is formed through the core and the insulation layer, and the stacked structure is formed such that the through-hole portion has end connected to the land portion and the end has width set greater than width of bottom of the via conductor and smaller than width of top of the via conductor.

公开(公告)号：US20140041923A1

公开(公告)日：2014-02-13

申请号：US13779944

申请日：2013-02-28

Applicant: IBIDEN CO., LTD.

Inventor： Teruyoshi HISADA ,  Takashi Nakane

IPC: H05K1/11

CPC classification number: H05K1/115 ,  H05K3/429 ,  H05K3/4602 ,  H05K3/4652 ,  H05K2201/09509 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09827 ,  H05K2201/09854 ,  H05K2201/09863 ,  H05K2203/0554

Abstract: A wiring board includes a board including a core, a conductive layer on the core, and a laminated structure over the core and conductive layer, and a stacked structure formed in the board and including a through-hole conductor through the core and a via conductor in the laminated structure. The through-hole conductor has though-hole portion through the core and land portion on the core, the laminated structure includes an insulation layer in which the via conductor is formed, the via conductor is stacked on the land portion such that the stacked structure including the through-hole and via conductors is formed through the core and the insulation layer, and the stacked structure is formed such that the through-hole portion has end connected to the land portion and the end has width set greater than width of bottom of the via conductor and smaller than width of top of the via conductor.

Abstract translation: 布线基板包括：基板，其包括芯，芯上的导电层，以及芯和导电层之上的叠层结构;以及层叠结构，形成在所述基板上，并且包括通过所述芯的通孔导体和通孔导体 在层压结构中。 通孔导体具有穿过芯部的芯部和芯部的平台部分的通孔部分，该层压结构包括其中形成通孔导体的绝缘层，通孔导体堆叠在焊盘部分上，使得堆叠结构包括 通孔和通孔导体通过芯和绝缘层形成，并且层叠结构形成为使得通孔部分具有端部连接到接合部分，并且端部的宽度设定为大于底部的宽度 通孔导体并小于通孔导体顶部的宽度。