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公开(公告)号：US11429172B2
公开(公告)日：2022-08-30
申请号：US16735563
申请日：2020-01-06
Applicant: Intel Corporation
Inventor： Alexander Uan-Zo-Li , Eugene Gorbatov , Harish Krishnamurthy , Alexander Lyakhov , Patrick Leung , Stephen Gunther , Arik Gihon , Khondker Ahmed , Philip Lehwalder , Sameer Shekhar , Vishram Pandit , Nimrod Angel , Michael Zelikson
Abstract: A power supply architecture combines the benefits of a traditional single stage power delivery, when there are no additional power losses in the integrated VR with low VID and low CPU losses of FIVR (fully integrated voltage regulator) and D-LVR (digital linear voltage regulator). The D-LVR is not in series with the main power flow, but in parallel. By placing the digital-LVR in parallel to a primary VR (e.g., motherboard VR), the CPU VID is lowered and the processor core power consumption is lowered. The power supply architecture reduces the guard band for input power supply level, thereby reducing the overall power consumption because the motherboard VR specifications can be relaxed, saving cost and power. The power supply architecture drastically increases the CPU performance at a small extra cost for the silicon and low complexity of tuning.
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公开(公告)号：US10976764B2
公开(公告)日：2021-04-13
申请号：US16575259
申请日：2019-09-18
Applicant: Intel Corporation
Inventor： Sergio Carlo Rodriguez , Alexander Lyakhov , Gerhard Schrom , Keith Hodgson , Sarath S. Makala , Sidhanto Roy
Abstract: A compensator is described with higher bandwidth than a traditional differential compensator, lower area than traditional differential compensator (e.g., 40% lower area), and lower power than traditional differential compensator. The compensator includes a differential to single-ended circuitry that reduces the number of passive devices used to compensate an input signal. The high bandwidth compensator allows for faster power state and/or voltage transitions. For example, a pre-charge technique is applied to handle faster power state transitions that enables aggressive dynamic voltage and frequency scaling (DVFS) and voltage transitions. The compensator is configurable in that it can operate in voltage mode or current mode.
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3.发明申请公开(公告)号：US20200321873A1
公开(公告)日：2020-10-08
申请号：US16378412
申请日：2019-04-08
Applicant: Intel Corporation
Inventor： Juan Munoz Constantine , Alexander Lyakhov
Abstract: Various embodiments provide a voltage regulator circuit including two or more discontinuous conduction mode (DCM) phases coupled to an output node and coupled in parallel with one another. A control circuit may detect a trigger and switch all of the two or more DCM phases to a first state (charge state) responsive to the detection. The control circuit may switch a first DCM phase, of the two or more DCM phases, to a second state (discharge state) after a first predetermined time period in the first state and may switch a second DCM phase, of the two or more DCM phases, to the second state after a second predetermined time period in the first state, wherein the second predetermined time period is different than the first predetermined time period. Other embodiments may be described and claimed.
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公开(公告)号：US10541615B1
公开(公告)日：2020-01-21
申请号：US16021712
申请日：2018-06-28
Applicant: Intel Corporation
Inventor： Amit Jain , Sameer Shekhar , Alexander Lyakhov , Jonathan P. Douglas , Vivek Saxena
IPC: H02M3/158
Abstract: Techniques and mechanisms for mitigating an overshoot of a supply voltage provided with a voltage regulator (VR). In an embodiment, buck converter functionality of a VR is provided with first circuitry comprising a first inductor and first switch circuits variously coupled thereto. Second circuitry of the VR comprises a second inductor and second switch circuits variously coupled thereto. In response to an indication of a voltage overshoot condition, respective states of the first switch circuits and the second switch circuits are configured to enable a conductive path for dissipating energy with the first inductor, the second inductor, and various ones of the first switch circuits and the second switch circuits. In another embodiment, mitigating the voltage overshoot condition comprises alternately toggling between two different configurations of the second switch circuits.
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公开(公告)号：US20210080987A1
公开(公告)日：2021-03-18
申请号：US16575259
申请日：2019-09-18
Applicant: Intel Corporation
Inventor： Sergio Carlo Rodriguez , Alexander Lyakhov , Gerhard Schrom , Keith Hodgson , Sarath S. Makala , Sidhanto Roy
Abstract: A compensator is described with higher bandwidth than a traditional differential compensator, lower area than traditional differential compensator (e.g., 40% lower area), and lower power than traditional differential compensator. The compensator includes a differential to single-ended circuitry that reduces the number of passive devices used to compensate an input signal. The high bandwidth compensator allows for faster power state and/or voltage transitions. For example, a pre-charge technique is applied to handle faster power state transitions that enables aggressive dynamic voltage and frequency scaling (DVFS) and voltage transitions. The compensator is configurable in that it can operate in voltage mode or current mode.
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Patent Agency Ranking
6.发明授权公开(公告)号：US10651733B2
公开(公告)日：2020-05-12
申请号：US14810385
申请日：2015-07-27
Applicant: Intel Corporation
Inventor： Gerhard Schrom , Mark S. Milshtein , Alexander Lyakhov
Abstract: Described is an apparatus which comprises: a low-side switch coupled to an output node for providing regulated voltage supply; and a first driver operable to cause the low-side switch to turn off when the output node rises above a first transistor threshold voltage. Described is also a voltage regulator which comprises: a signal generator to generate a pulse-width modulated (PWM) signal; a bridge having a low-side switch coupled to an output node for providing regulated voltage supply according to the PWM signal; a first driver operable to cause the low-side switch to turn off when the output node rises above a first transistor threshold voltage; and a bridge controller to provide control signals to the first driver. The voltage regulator may operate without diode clamps and its operation is self-timed. The voltage regulator also provides tolerance against process variation.
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7.发明授权公开(公告)号：US10184961B2
公开(公告)日：2019-01-22
申请号：US15276697
申请日：2016-09-26
Applicant: Intel Corporation
Inventor： Gerhard Schrom , J. Keith Hodgson , Alexander Lyakhov , Chiu Keung Tang , Narayanan Raghuraman , Narayanan Natarajan
IPC: H03M1/66 , G01R19/00 , H02M3/157 , H03L5/00 , G06T3/40 , H02M3/156 , H02M1/088 , H02M3/158 , H03M1/68 , H02M1/00
Abstract: Described are apparatuses and methods of current balancing, current sensing and phase balancing, offset cancellation, digital to analog current converter with monotonic output using binary coded input (without binary to thermometer decoder), compensator for a voltage regulator (VR), etc. In one example, apparatus comprises: a plurality of inductors coupled to a capacitor and a load; a plurality of bridges, each of which is coupled to a corresponding inductor from the plurality of inductors; and a plurality of current sensors, each of which is coupled to a bridge to sense current through a transistor of the bridge.
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公开(公告)号：US10156859B2
公开(公告)日：2018-12-18
申请号：US14129860
申请日：2013-09-26
Applicant: Intel Corporation
Inventor： Kosta Luria , Alexander Lyakhov , Joseph Shor , Michael Zelikson
Abstract: Described is an apparatus which comprises: a first power supply node to supply input power supply; a power transistor coupled to the first power supply node; a multiplexer to selectively control gate terminal of the power transistor according to whether the power transistor is to operate as part of a low dropout voltage regulator (LDO-VR) or is to operate as a digital switch; and a second power supply node coupled to the power transistor, the second power supply node to provide power supply to a load from the power transistor.
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公开(公告)号：US10122265B1
公开(公告)日：2018-11-06
申请号：US15861604
申请日：2018-01-03
Applicant: Intel Corporation
Inventor： George E. Matthew , Gerhard Schrom , Alexander Lyakhov , Rachid E. Rayess , Anant S. Deval , Sergio Carlo Rodriguez , Pushkar Dixit
Abstract: An apparatus is provided which comprises: at least two switches in series between an input voltage node and a ground terminal; an inductor coupled between a mid-point of the at least two switches and an output terminal; a first circuitry to compare a current through the inductor with a threshold current, and to control one or both of the at least two switches, based at least in part on the comparison; and a second circuitry to randomly vary the threshold current over consecutive cycles of switching of the at least two switches.
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10.发明授权公开(公告)号：US11791731B2
公开(公告)日：2023-10-17
申请号：US17197532
申请日：2021-03-10
Applicant: Intel Corporation
Inventor： Juan Munoz Constantine , Alexander Lyakhov
CPC classification number: H02M3/1584 , G06F1/28 , H02M1/14 , H02M3/1586
Abstract: Various embodiments provide a voltage regulator circuit including two or more discontinuous conduction mode (DCM) phases coupled to an output node and coupled in parallel with one another. A control circuit may detect a trigger and switch all of the two or more DCM phases to a first state (charge state) responsive to the detection. The control circuit may switch a first DCM phase, of the two or more DCM phases, to a second state (discharge state) after a first predetermined time period in the first state and may switch a second DCM phase, of the two or more DCM phases, to the second state after a second predetermined time period in the first state, wherein the second predetermined time period is different than the first predetermined time period. Other embodiments may be described and claimed.
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