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公开(公告)号：US20140347773A1
公开(公告)日：2014-11-27
申请号：US14281845
申请日：2014-05-19
Applicant: INNOCHIPS TECHNOLOGY CO., LTD.
Inventor： In Kil PARK , Tae Hyung NOH , Gyeong-Tae KIM , Myung Ho LEE , Jung Hun LEE , Euy Ho SHIN , Jin Hwan KIM , Song Yeon LEE
CPC classification number: H02H9/005 , H03H7/0115 , H03H2001/0085
Abstract: Provided is a circuit protection device including a plurality of sheets selectively formed with at least one coil pattern, at least one withdrawal electrode, at least one hole filled with a conductive material, and at least one capacitor electrode and at least two inductors and at least two capacitors, in which the at least one coil pattern forms one inductor and a capacitor is formed between the capacitor electrode and the coil pattern.
Abstract translation: 提供一种电路保护装置，其包括选择性地形成有至少一个线圈图案的多个片材，至少一个取出电极，填充有导电材料的至少一个孔，以及至少一个电容器电极和至少两个电感器，并且至少 两个电容器，其中至少一个线圈图案形成一个电感器，并且电容器形成在电容器电极和线圈图案之间。
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公开(公告)号：US20170133142A1
公开(公告)日：2017-05-11
申请号：US14986447
申请日：2015-12-31
Applicant: INNOCHIPS TECHNOLOGY CO., LTD.
Inventor： In Kil PARK , Tae Hyung NOH , Myung Ho LEE , Song Yeon LEE , Jung Hun LEE , Hyun Mo KANG
CPC classification number: H01F17/0013 , H01F19/04 , H01F27/24 , H01F27/29 , H01F27/292 , H01F2017/0093 , H02H9/04 , H03H1/0007 , H03H7/01 , H03H2001/0085
Abstract: The present disclosure includes: a laminate in which a plurality of sheets are laminated; two or more noise filters provided spaced apart by a predetermined distance from each other in the laminate and respectively provided with a plurality of coil patterns; an external electrode provided outside the laminate and connected to the two or more noise filters; and a connection electrode provided outside the laminate being spaced apart from the external electrode to connect the two or more coil patterns.
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Patent Agency Ranking
公开(公告)号：US20160276995A1
公开(公告)日：2016-09-22
申请号：US15073622
申请日：2016-03-17
Applicant: INNOCHIPS TECHNOLOGY CO., LTD.
Inventor： In Kil PARK , Tae Hyung NOH , Gyeong Tae KIM , Myung Ho LEE , Tae Geun SEO , Min Soo LEE , Song Yeon LEE
CPC classification number: H03H1/00 , H01F17/0013 , H01F27/2804 , H01F2017/002 , H01F2017/0026 , H01F2027/2809 , H01G4/005 , H01G4/232 , H01G4/30 , H01G4/40 , H03H7/0115 , H03H2001/0085
Abstract: Provided is a laminated chip device including a first laminate in which a plurality of conductor patterns formed on a plurality of sheets are connected to each other through a via formed to penetrate at least a sheet, and a second laminate provided over or below the first laminate and having a plurality of internal electrode patterns formed on a plurality of sheets, and the internal electrode patterns have a non-conductive region in at least a portion of an area corresponding to the via.
Abstract translation: 提供了一种层叠芯片装置，其包括：第一层压体，其中形成在多个片材上的多个导体图案通过形成为穿透至少一个片材的通孔彼此连接;以及第二层压体，其设置在第一层压体上方或下方 并且具有形成在多个片材上的多个内部电极图案，并且内部电极图案在与通孔对应的区域的至少一部分中具有非导电区域。
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公开(公告)号：US20150280682A1
公开(公告)日：2015-10-01
申请号：US14672089
申请日：2015-03-27
Applicant: INNOCHIPS TECHNOLOGY CO., LTD.
Inventor： In Kil PARK , Tae Hyung NOH , Myung Ho LEE , Jung Hun LEE , Byong Moon NAM , Hyun Mo KANG , Song Yeon LEE , Jin Hwan KIM
CPC classification number: H03H7/17 , H01F17/0013 , H01F27/24 , H01F27/2804 , H05F3/04
Abstract: A circuit protection device includes a plurality of sheets stacked in a vertical direction, each of which may include at least two conductive patterns formed separately from each other in a horizontal direction, and at least two common mode noise filters disposed in the horizontal direction, each of which includes at least two conductive patterns connected in the vertical direction.
Abstract translation: 电路保护装置包括沿垂直方向堆叠的多个片材，每个片材可以包括在水平方向上彼此分开形成的至少两个导电图案，以及至少两个沿水平方向布置的共模噪声滤波器 其中包括沿垂直方向连接的至少两个导电图案。
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公开(公告)号：US20150214916A1
公开(公告)日：2015-07-30
申请号：US14608115
申请日：2015-01-28
Applicant: INNOCHIPS TECHNOLOGY CO., LTD.
Inventor： In Kil PARK , Tae Hyung NOH , Gyeong Tae KIM , Tae Geun SEO , Myung Ho LEE , Min Soo LEE
CPC classification number: H03H7/0115 , H03H2001/0085
Abstract: The present disclosure relates to a stacked chip device including a first stack unit comprising a plurality of electrode patterns respectively disposed for a unit device region and common electrode patterns formed to be connected to cross the unit device regions, a second stack unit disposed on a top portion of the first stack unit and comprising a plurality of first conductor patterns, and a third stack unit disposed on a bottom portion of the first stack unit and comprising a plurality of second conductor patterns, wherein the first and second conductor patterns are formed on a plurality of sheets, the first and second conductor patterns formed on one sheet are formed across a plurality of unit device regions, and the first and second conductor patterns are connected vertically through vias formed penetrating through at least some of the sheets.
Abstract translation: 本公开涉及一种堆叠式芯片装置，其包括：第一堆叠单元，包括分别设置用于单位装置区域的多个电极图案和形成为连接以跨过单位装置区域的公共电极图案;第二堆叠单元，设置在顶部 第一堆叠单元的一部分并且包括多个第一导体图案，以及设置在第一堆叠单元的底部上并且包括多个第二导体图案的第三堆叠单元，其中第一和第二导体图案形成在第一堆叠单元 多个片材，形成在一个片材上的第一和第二导体图案跨越多个单元器件区域形成，并且第一和第二导体图案垂直地穿过穿过至少一些片材的通孔。
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公开(公告)号：US20140375406A1
公开(公告)日：2014-12-25
申请号：US14484242
申请日：2014-09-11
Applicant: INNOCHIPS TECHNOLOGY CO., LTD.
Inventor： In-Kil PARK , Tae-Hyung NOH , Kyu Cheol JANG , Myung Ho LEE , Gyeong Tae KIM , Sang Hwan LEE
CPC classification number: H01F27/402 , H01F17/0033 , H01F27/2804 , H01F2027/2809 , H01L21/02 , H03H7/0107 , H03H7/427 , H03H2001/0085 , H05K9/0067 , Y10T156/1052 , Y10T156/1056
Abstract: The present invention relates to a circuit protection device and a method of manufacturing the same. The circuit protection device includes a common mode noise filter having a plurality of sheets, each of the sheets being formed to optionally include a coil pattern, an internal electrode, a hole filled with a conductive material, and a hole filled with a magnetic material; and an electrostatic discharge (ESD) protection device having a plurality of sheets, each of the sheets being formed to optionally include an internal electrode and a hole filled with an ESD protection material.
Abstract translation: 电路保护装置及其制造方法技术领域本发明涉及电路保护装置及其制造方法。 电路保护装置包括具有多个片材的共模噪声滤波器，每个片材形成为可选地包括线圈图案，内部电极，填充有导电材料的孔和填充有磁性材料的孔; 以及具有多个片材的静电放电（ESD）保护装置，每个片材形成为可选地包括内部电极和填充有ESD保护材料的孔。
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公开(公告)号：US20130295694A1
公开(公告)日：2013-11-07
申请号：US13936131
申请日：2013-07-05
Applicant: Innochips Technology Co., Ltd.
Inventor： In-Kil PARK , Tae-Hyung NOH , Kyu Cheol JANG , Myung Ho LEE , Gyeong Tae KIM , Sang Hwan Lee
IPC: H01L21/02
CPC classification number: H01F27/402 , H01F17/0033 , H01F27/2804 , H01F2027/2809 , H01L21/02 , H03H7/0107 , H03H7/427 , H03H2001/0085 , H05K9/0067 , Y10T156/1052 , Y10T156/1056
Abstract: The present invention relates to a circuit protection device and a method of manufacturing the same. The circuit protection device includes a common mode noise filter having a plurality of sheets, each of the sheets being formed to optionally include a coil pattern, an internal electrode, a hole filled with a conductive material, and a hole filled with a magnetic material; and an electrostatic discharge (ESD) protection device having a plurality of sheets, each of the sheets being formed to optionally include an internal electrode and a hole filled with an ESD protection material.According to the present invention, a solenoid-type common mode noise filter and an ESD protection device are laminated as a single device, and thereby common mode noises and ESD of the electronic device can be simultaneously prevented. Accordingly, the circuit protection device has a simple configuration as compared with a conventional art in which discrete devices are used to prevent common mode noises and ESD, so that an increase in size of an electronic device can be prevented, and input/output signal distortion can be prevented to thereby enhance the reliability of the electronic device.
Abstract translation: 电路保护装置及其制造方法技术领域本发明涉及电路保护装置及其制造方法。 电路保护装置包括具有多个片材的共模噪声滤波器，每个片材形成为可选地包括线圈图案，内部电极，填充有导电材料的孔和填充有磁性材料的孔; 以及具有多个片材的静电放电（ESD）保护装置，每个片材形成为可选地包括内部电极和填充有ESD保护材料的孔。 根据本发明，螺线管式共模噪声滤波器和ESD保护装置被层叠为单个装置，从而可以同时防止电子装置的共模噪声和ESD。 因此，与使用分立器件来防止共模噪声和ESD的传统技术相比，电路保护装置具有简单的结构，从而可以防止电子装置的尺寸增大，并且输入/输出信号失真 可以防止电子装置的可靠性提高。
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