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    STACKED CHIP DEVICE
    3.
    发明申请
    STACKED CHIP DEVICE 有权
    堆叠芯片设备

    公开(公告)号：US20150214916A1

    公开(公告)日：2015-07-30

    申请号：US14608115

    申请日：2015-01-28

    Applicant: INNOCHIPS TECHNOLOGY CO., LTD.

    Inventor： In Kil PARK ,  Tae Hyung NOH ,  Gyeong Tae KIM ,  Tae Geun SEO ,  Myung Ho LEE ,  Min Soo LEE

    IPC: H03H7/01 ,  H03H7/06

    CPC classification number: H03H7/0115 ,  H03H2001/0085

    Abstract: The present disclosure relates to a stacked chip device including a first stack unit comprising a plurality of electrode patterns respectively disposed for a unit device region and common electrode patterns formed to be connected to cross the unit device regions, a second stack unit disposed on a top portion of the first stack unit and comprising a plurality of first conductor patterns, and a third stack unit disposed on a bottom portion of the first stack unit and comprising a plurality of second conductor patterns, wherein the first and second conductor patterns are formed on a plurality of sheets, the first and second conductor patterns formed on one sheet are formed across a plurality of unit device regions, and the first and second conductor patterns are connected vertically through vias formed penetrating through at least some of the sheets.

    Abstract translation: 本公开涉及一种堆叠式芯片装置，其包括：第一堆叠单元，包括分别设置用于单位装置区域的多个电极图案和形成为连接以跨过单位装置区域的公共电极图案;第二堆叠单元，设置在顶部 第一堆叠单元的一部分并且包括多个第一导体图案，以及设置在第一堆叠单元的底部上并且包括多个第二导体图案的第三堆叠单元，其中第一和第二导体图案形成在第一堆叠单元 多个片材，形成在一个片材上的第一和第二导体图案跨越多个单元器件区域形成，并且第一和第二导体图案垂直地穿过穿过至少一些片材的通孔。

    CIRCUIT PROTECTION DEVICE AND METHOD OF MANUFACTURING THE SAME
    5.
    发明申请
    CIRCUIT PROTECTION DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
    电路保护装置及其制造方法

    公开(公告)号：US20130295694A1

    公开(公告)日：2013-11-07

    申请号：US13936131

    申请日：2013-07-05

    Applicant: Innochips Technology Co., Ltd.

    Inventor： In-Kil PARK ,  Tae-Hyung NOH ,  Kyu Cheol JANG ,  Myung Ho LEE ,  Gyeong Tae KIM ,  Sang Hwan Lee

    IPC: H01L21/02

    CPC classification number: H01F27/402 ,  H01F17/0033 ,  H01F27/2804 ,  H01F2027/2809 ,  H01L21/02 ,  H03H7/0107 ,  H03H7/427 ,  H03H2001/0085 ,  H05K9/0067 ,  Y10T156/1052 ,  Y10T156/1056

    Abstract: The present invention relates to a circuit protection device and a method of manufacturing the same. The circuit protection device includes a common mode noise filter having a plurality of sheets, each of the sheets being formed to optionally include a coil pattern, an internal electrode, a hole filled with a conductive material, and a hole filled with a magnetic material; and an electrostatic discharge (ESD) protection device having a plurality of sheets, each of the sheets being formed to optionally include an internal electrode and a hole filled with an ESD protection material.According to the present invention, a solenoid-type common mode noise filter and an ESD protection device are laminated as a single device, and thereby common mode noises and ESD of the electronic device can be simultaneously prevented. Accordingly, the circuit protection device has a simple configuration as compared with a conventional art in which discrete devices are used to prevent common mode noises and ESD, so that an increase in size of an electronic device can be prevented, and input/output signal distortion can be prevented to thereby enhance the reliability of the electronic device.

    Abstract translation: 电路保护装置及其制造方法技术领域本发明涉及电路保护装置及其制造方法。 电路保护装置包括具有多个片材的共模噪声滤波器，每个片材形成为可选地包括线圈图案，内部电极，填充有导电材料的孔和填充有磁性材料的孔; 以及具有多个片材的静电放电（ESD）保护装置，每个片材形成为可选地包括内部电极和填充有ESD保护材料的孔。 根据本发明，螺线管式共模噪声滤波器和ESD保护装置被层叠为单个装置，从而可以同时防止电子装置的共模噪声和ESD。 因此，与使用分立器件来防止共模噪声和ESD的传统技术相比，电路保护装置具有简单的结构，从而可以防止电子装置的尺寸增大，并且输入/输出信号失真 可以防止电子装置的可靠性提高。

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