公开(公告)号：US20210210478A1

公开(公告)日：2021-07-08

申请号：US17191615

申请日：2021-03-03

Applicant: Intel Corporation

Inventor： Susheel JADHAV ,  Juan DOMINGUEZ ,  Ankur AGRAWAL ,  Kenneth BROWN ,  Yi LI ,  Jing CHEN ,  Aditi MALLIK ,  Xiaoyu HONG ,  Thomas LILJEBERG ,  Andrew C. ALDUINO ,  Ling LIAO ,  David HUI ,  Ren-Kang CHIOU ,  Harinadh POTLURI ,  Hari MAHALINGAM ,  Lobna KAMYAB ,  Sasanka KANUPARTHI ,  Sushrutha Reddy GUJJULA ,  Saeed FATHOLOLOUMI ,  Priyanka DOBRIYAL ,  Boping XIE ,  Abiola AWUJOOLA ,  Vladimir TAMARKIN ,  Keith MEASE ,  Stephen KEELE ,  David SCHWEITZER ,  Brent ROTHERMEL ,  Ning TANG ,  Suresh POTHUKUCHI ,  Srikant NEKKANTY ,  Zhichao ZHANG ,  Kaiyuan ZENG ,  Baikuan WANG ,  Donald TRAN ,  Ravindranath MAHAJAN ,  Baris BICEN ,  Grant SMITH

IPC: H01L25/18 ,  H01L23/473 ,  H01R12/71

Abstract: Embodiments disclosed herein include electronic packages for optical to electrical switching. In an embodiment, an electronic package comprises a first package substrate and a second package substrate attached to the first package substrate. In an embodiment, a die is attached to the second package substrate. In an embodiment, a plurality of photonic engines are attached to a first surface and a second surface of the first package substrate. In an embodiment, the plurality of photonic engines are communicatively coupled to the die through the first package substrate and the second package substrate.

公开(公告)号：US20210408339A1

公开(公告)日：2021-12-30

申请号：US17100595

申请日：2020-11-20

Applicant: Intel Corporation

Inventor： Ankur AGARWAL ,  Priyanka DOBRIYAL

IPC: H01L33/48 ,  H01L33/40 ,  H01L33/26

Abstract: Embodiments disclosed herein include electronic packages with vents to prevent pressure buildup below a die. In an embodiment, an electronic package comprises a package substrate and a die attached to the package substrate by interconnects. In an embodiment, an underfill is under the die and surrounds the interconnects. In an embodiment, a void is provided in the underfill, and a vent is in the underfill. In an embodiment, the vent is fluidically coupled to the void and extends to an edge of the underfill.

公开(公告)号：US20220416503A1

公开(公告)日：2022-12-29

申请号：US17357938

申请日：2021-06-24

Applicant: Intel Corporation

Inventor： Priyanka DOBRIYAL ,  Aditi MALLIK ,  Saeed FATHOLOLOUMI ,  Ankur AGRAWAL ,  Anna PRAKASH ,  Hemant Mahesh SHAH ,  Raiyomand ASPANDIAR ,  Neil Raymund CARANTO

IPC: H01S5/024 ,  H01S5/34

Abstract: Embodiments described herein may be related to apparatuses, processes, and techniques related to thermal routing techniques within a hybrid silicon laser or photonics integrated circuit to facilitate heat extraction during laser operation. In particular dual metal layers, with a top metal layer thermally coupled with P node above a quantum well and extending substantially under a heat sink, and a bottom metal layer thermally coupled with an N node, where the top metal layer and the bottom metal layer are not electrically coupled. Other embodiments may be described and/or claimed.

公开(公告)号：US20220155539A1

公开(公告)日：2022-05-19

申请号：US16953146

申请日：2020-11-19

Applicant: Intel Corporation

Inventor： Srinivas V. PIETAMBARAM ,  Brandon C. MARIN ,  Sameer PAITAL ,  Sai VADLAMANI ,  Rahul N. MANEPALLI ,  Xiaoqian LI ,  Suresh V. POTHUKUCHI ,  Sujit SHARAN ,  Arnab SARKAR ,  Omkar KARHADE ,  Nitin DESHPANDE ,  Divya PRATAP ,  Jeremy ECTON ,  Debendra MALLIK ,  Ravindranath V. MAHAJAN ,  Zhichao ZHANG ,  Kemal AYGÜN ,  Bai NIE ,  Kristof DARMAWIKARTA ,  James E. JAUSSI ,  Jason M. GAMBA ,  Bryan K. CASPER ,  Gang DUAN ,  Rajesh INTI ,  Mozhgan MANSURI ,  Susheel JADHAV ,  Kenneth BROWN ,  Ankar AGRAWAL ,  Priyanka DOBRIYAL

IPC: G02B6/42

Abstract: Embodiments disclosed herein include optical packages. In an embodiment, an optical package comprises a package substrate, and a photonics die coupled to the package substrate. In an embodiment, a compute die is coupled to the package substrate, where the photonics die is communicatively coupled to the compute die by a bridge in the package substrate. In an embodiment, the optical package further comprises an optical waveguide embedded in the package substrate. In an embodiment, a first end of the optical waveguide is below the photonics die, and a second end of the optical waveguide is substantially coplanar with an edge of the package substrate.

公开(公告)号：US20210074866A1

公开(公告)日：2021-03-11

申请号：US16562889

申请日：2019-09-06

Applicant: Intel Corporation

Inventor： Priyanka DOBRIYAL ,  Ankur AGRAWAL ,  Susheel JADHAV ,  Quan TRAN ,  Raghuram NARAYAN ,  Raiyomand ASPANDIAR ,  Kenneth BROWN ,  John HECK

IPC: H01L31/0232 ,  G02B3/00 ,  H01L31/0216 ,  H01L31/02 ,  H01L25/16 ,  H01L23/538 ,  H01L31/18 ,  G02B1/11 ,  G02B6/42

Abstract: Embodiments disclosed herein include optoelectronic systems and methods of forming such systems. In an embodiment the optoelectronic system comprises a board, and a carrier attached to the board. In an embodiment, a first die is on the carrier. In an embodiment, the first die is a photonics die, and a surface of the first die is covered by an optically transparent layer.