公开(公告)号：US20210210478A1

公开(公告)日：2021-07-08

申请号：US17191615

申请日：2021-03-03

Applicant: Intel Corporation

Inventor： Susheel JADHAV ,  Juan DOMINGUEZ ,  Ankur AGRAWAL ,  Kenneth BROWN ,  Yi LI ,  Jing CHEN ,  Aditi MALLIK ,  Xiaoyu HONG ,  Thomas LILJEBERG ,  Andrew C. ALDUINO ,  Ling LIAO ,  David HUI ,  Ren-Kang CHIOU ,  Harinadh POTLURI ,  Hari MAHALINGAM ,  Lobna KAMYAB ,  Sasanka KANUPARTHI ,  Sushrutha Reddy GUJJULA ,  Saeed FATHOLOLOUMI ,  Priyanka DOBRIYAL ,  Boping XIE ,  Abiola AWUJOOLA ,  Vladimir TAMARKIN ,  Keith MEASE ,  Stephen KEELE ,  David SCHWEITZER ,  Brent ROTHERMEL ,  Ning TANG ,  Suresh POTHUKUCHI ,  Srikant NEKKANTY ,  Zhichao ZHANG ,  Kaiyuan ZENG ,  Baikuan WANG ,  Donald TRAN ,  Ravindranath MAHAJAN ,  Baris BICEN ,  Grant SMITH

IPC: H01L25/18 ,  H01L23/473 ,  H01R12/71

Abstract: Embodiments disclosed herein include electronic packages for optical to electrical switching. In an embodiment, an electronic package comprises a first package substrate and a second package substrate attached to the first package substrate. In an embodiment, a die is attached to the second package substrate. In an embodiment, a plurality of photonic engines are attached to a first surface and a second surface of the first package substrate. In an embodiment, the plurality of photonic engines are communicatively coupled to the die through the first package substrate and the second package substrate.

公开(公告)号：US20250102740A1

公开(公告)日：2025-03-27

申请号：US18373851

申请日：2023-09-27

Applicant: Intel Corporation

Inventor： Harel FRISH ,  Hari MAHALINGAM ,  Saeed FATHOLOLOUMI ,  Shane YERKES ,  John HECK ,  Wei QIAN

IPC: G02B6/36

Abstract: A device comprising a silicon substrate and a waveguide on the silicon substrate. A groove is in the substrate, the groove having a sloped rear wall adjacent to the waveguide. A trench is in the substrate, the trench along a second direction generally orthogonal to the first direction across the sloped rear wall, the trench having a vertical wall at an intersection with the sloped rear wall. An optical fiber in the groove with one end of the optical fiber abutting the vertical wall.

公开(公告)号：US20220416503A1

公开(公告)日：2022-12-29

申请号：US17357938

申请日：2021-06-24

Applicant: Intel Corporation

Inventor： Priyanka DOBRIYAL ,  Aditi MALLIK ,  Saeed FATHOLOLOUMI ,  Ankur AGRAWAL ,  Anna PRAKASH ,  Hemant Mahesh SHAH ,  Raiyomand ASPANDIAR ,  Neil Raymund CARANTO

IPC: H01S5/024 ,  H01S5/34

Abstract: Embodiments described herein may be related to apparatuses, processes, and techniques related to thermal routing techniques within a hybrid silicon laser or photonics integrated circuit to facilitate heat extraction during laser operation. In particular dual metal layers, with a top metal layer thermally coupled with P node above a quantum well and extending substantially under a heat sink, and a bottom metal layer thermally coupled with an N node, where the top metal layer and the bottom metal layer are not electrically coupled. Other embodiments may be described and/or claimed.