公开(公告)号：US20240422908A1

公开(公告)日：2024-12-19

申请号：US18821067

申请日：2024-08-30

Applicant: LG INNOTEK CO., LTD.

Inventor： Kyo Hun KOO ,  Jin Hak LEE ,  In Ho JEONG

IPC: H05K1/11 ,  H05K1/02 ,  H05K3/42

Abstract: A circuit board according to an embodiment includes: an insulating layer including a through hole and a via disposed in the through hole and wherein the via including a first metal layer on an upper surface of the insulating layer and an inner wall of the through hole; and a second metal layer disposed in the through hole, and the an upper surface of the second metal layer includes a protruding portion that does not overlap an upper surface of the insulating layer in a vertical direction and is located higher than the first metal layer.

公开(公告)号：US20170019992A1

公开(公告)日：2017-01-19

申请号：US14831674

申请日：2015-08-20

Applicant: LG INNOTEK CO., LTD.

Inventor： Yun Mi BAE ,  Soon Gyu KWON ,  Sang Hwa KIM ,  Sang Young LEE ,  Jin Hak LEE ,  Han Su LEE ,  Dong Hun JEONG ,  In Ho JEONG ,  Dae Young CHOI ,  Jung Ho HWANG

IPC: H05K1/11 ,  C25D5/48 ,  C25D7/12 ,  C25D5/02 ,  H05K1/09 ,  C25D3/48

CPC classification number: H05K1/11 ,  C25D3/38 ,  C25D3/48 ,  C25D5/022 ,  C25D5/48 ,  C25D7/123 ,  H05K1/09 ,  H05K3/108 ,  H05K3/181 ,  H05K3/188 ,  H05K3/244 ,  H05K2201/0338 ,  H05K2201/098 ,  H05K2201/0989 ,  H05K2201/099 ,  H05K2203/1184

Abstract: A printed circuit board includes an insulating layer, a circuit pattern on the insulating layer, and a surface treatment layer on the circuit pattern. The surface treatment layer includes a bottom surface having a width wider than a width of a top surface of the circuit pattern.

Abstract translation: 印刷电路板包括绝缘层，绝缘层上的电路图案和电路图案上的表面处理层。 表面处理层包括具有比电路图案的顶表面的宽度宽的宽度的底表面。

公开(公告)号：US20180332714A1

公开(公告)日：2018-11-15

申请号：US15878701

申请日：2018-01-24

Applicant: LG INNOTEK CO., LTD.

Inventor： Yun Mi BAE ,  Soon Gyu KWON ,  Sang Hwa KIM ,  Sang Young LEE ,  Jin Hak LEE ,  Han Su LEE ,  Dong Hun JEONG ,  In Ho JEONG ,  Dae Young CHOI ,  Jung Ho HWANG

IPC: H05K3/24 ,  H05K1/09 ,  H05K3/18 ,  C25D3/48 ,  C25D3/38 ,  C25D7/12 ,  C25D5/48 ,  C25D5/02

CPC classification number: H05K3/244 ,  C25D3/38 ,  C25D3/48 ,  C25D5/022 ,  C25D5/48 ,  C25D7/123 ,  H05K1/09 ,  H05K1/11 ,  H05K3/108 ,  H05K3/181 ,  H05K3/188 ,  H05K2201/0338 ,  H05K2201/098 ,  H05K2201/0989 ,  H05K2201/099 ,  H05K2203/1184

Abstract: A printed circuit board includes: an insulating layer; a plating seed layer disposed on the insulating layer; a circuit pattern layer disposed on the plating seed layer and formed of copper (Cu); and a surface treatment layer disposed on the circuit pattern layer and formed of gold (Au), wherein the circuit pattern layer includes a corner portion of an upper portion which has a curvature, and wherein the corner portion of the circuit pattern layer is a boundary surface between the top surface and a side surface of the circuit pattern layer, and the boundary surface has a concavely curved surface.

公开(公告)号：US20170251556A1

公开(公告)日：2017-08-31

申请号：US15594778

申请日：2017-05-15

Applicant: LG INNOTEK CO., LTD.

Inventor： Yun Mi BAE ,  Soon Gyu KWON ,  Sang Hwa KIM ,  Sang Young LEE ,  Jin Hak LEE ,  Han Su LEE ,  Dong Hun JEONG ,  In Ho JEONG ,  Dae Young CHOI ,  Jung Ho HWANG

IPC: H05K3/18 ,  H05K3/24 ,  H05K1/09

CPC classification number: H05K1/11 ,  C25D3/38 ,  C25D3/48 ,  C25D5/022 ,  C25D5/48 ,  C25D7/123 ,  H05K1/09 ,  H05K3/108 ,  H05K3/181 ,  H05K3/188 ,  H05K3/244 ,  H05K2201/0338 ,  H05K2201/098 ,  H05K2201/0989 ,  H05K2201/099 ,  H05K2203/1184

Abstract: A printed circuit board includes: an insulating layer; a plating seed layer disposed on the insulating layer; a circuit pattern layer disposed on the plating seed layer and formed of copper (Cu); and a surface treatment layer disposed on the circuit pattern layer and formed of gold (Au), wherein a width of a bottom surface of the surface treatment layer is narrower than a width of a top surface of the plating seed layer, wherein the bottom surface of the surface treatment layer includes: a first portion contacted with the circuit pattern layer; and a second portion non contacted with the circuit pattern layer, and wherein a width of a top surface of the circuit pattern layer is narrower than a width of a bottom surface of the circuit pattern layer.

公开(公告)号：US20230337370A1

公开(公告)日：2023-10-19

申请号：US18337706

申请日：2023-06-20

Applicant: LG INNOTEK CO., LTD.

Inventor： Yun Mi BAE ,  Soon Gyu KWON ,  Sang Hwa KIM ,  Sang Young LEE ,  Jin Hak LEE ,  Han Su LEE ,  Dong Hun JEONG ,  In Ho JEONG ,  Dae Young CHOI ,  Jung Ho HWANG

IPC: H05K3/24 ,  H05K3/10 ,  C25D5/48 ,  H05K3/18 ,  H05K1/09 ,  C25D7/12 ,  H05K1/02 ,  C25D3/48 ,  C25D5/02 ,  H05K1/11 ,  C25D3/38

CPC classification number: H05K3/244 ,  H05K3/108 ,  C25D5/48 ,  H05K3/181 ,  H05K1/09 ,  C25D7/123 ,  H05K1/0296 ,  C25D3/48 ,  H05K3/188 ,  C25D5/022 ,  H05K1/11 ,  H05K2201/0989 ,  C25D3/38 ,  H05K2201/0338 ,  H05K2201/099 ,  H05K2201/098 ,  H05K2203/1184

Abstract: A printed circuit board includes an insulating layer, a circuit pattern on the insulating layer, and a surface treatment layer on the circuit pattern. The surface treatment layer includes a bottom surface having a width wider than a width of a top surface of the circuit pattern.

公开(公告)号：US20220418107A1

公开(公告)日：2022-12-29

申请号：US17756541

申请日：2020-11-26

Applicant: LG INNOTEK CO., LTD.

Inventor： Kyo Hun KOO ,  Jin Hak LEE ,  In Ho JEONG

IPC: H05K1/11

Abstract: A printed circuit board according to an embodiment includes: an insulating layer including a via hole; and a via disposed in the via hole of the insulating layer, wherein the via includes; a connection portion disposed in the via hole of the insulating layer; a first pad disposed on an upper surface of the insulating layer and an upper surface of the connection portion; and a second pad disposed under a lower surface of the insulating layer and a lower surface of the connection portion, wherein the upper surface of the connection portion has a concave shape in a downward direction, the lower surface of the connection portion has a concave shape in an upward direction, a lower surface of the first pad has a convex shape corresponding to the upper surface of the connection portion, and an upper surface of the second pad has a convex shape corresponding to the lower surface of the connection portion.

公开(公告)号：US20210120677A1

公开(公告)日：2021-04-22

申请号：US17135223

申请日：2020-12-28

Applicant: LG INNOTEK CO., LTD.

Inventor： Jung Ho HWANG ,  Han Su LEE ,  Dae Young CHOI ,  Soon Gyu KWON ,  Dong Hun JEONG ,  In Ho JEONG ,  Kil Dong SON ,  Sang Hwa KIM ,  Sang Young LEE ,  Jae Hoon JEON ,  Jin Hak LEE ,  Yun Mi BAE

IPC: H05K3/18 ,  H05K1/02 ,  H05K1/09 ,  H05K3/10 ,  H05K3/46 ,  H05K3/00

Abstract: A method of manufacturing a printed circuit board includes providing an insulating layer, forming a plating seed layer on the insulating layer, forming a first circuit pattern on the plating seed layer and a second circuit pattern on the first circuit pattern, and forming a top metal layer on the second circuit pattern. The second circuit pattern can be thinner than the first circuit pattern, and the top metal layer can be wider than the second circuit pattern.

公开(公告)号：US20220240390A1

公开(公告)日：2022-07-28

申请号：US17653054

申请日：2022-03-01

Applicant: LG INNOTEK CO., LTD.

Inventor： Yun Mi BAE ,  Soon Gyu KWON ,  Sang Hwa KIM ,  Sang Young LEE ,  Jin Hak LEE ,  Han Su LEE ,  Dong Hun JEONG ,  In Ho JEONG ,  Dae Young CHOI ,  Jung Ho HWANG

IPC: H05K3/24 ,  H05K3/18 ,  H05K3/10 ,  H05K1/02 ,  C25D3/48 ,  C25D5/02 ,  C25D5/48 ,  C25D7/12 ,  H05K1/09 ,  H05K1/11

Abstract: A printed circuit board includes an insulating layer, a circuit pattern on the insulating layer, and a surface treatment layer on the circuit pattern. The surface treatment layer includes a bottom surface having a width wider than a width of a top surface of the circuit pattern.

公开(公告)号：US20210243901A1

公开(公告)日：2021-08-05

申请号：US17236519

申请日：2021-04-21

Applicant: LG INNOTEK CO., LTD.

Inventor： Yun Mi BAE ,  Soon Gyu KWON ,  Sang Hwa KIM ,  Sang Young LEE ,  Jin Hak LEE ,  Han Su LEE ,  Dong Hun JEONG ,  In Ho JEONG ,  Dae Young CHOI ,  Jung Ho HWANG

IPC: H05K3/24 ,  H05K3/18 ,  H05K3/10 ,  H05K1/02 ,  C25D3/48 ,  C25D5/02 ,  C25D5/48 ,  C25D7/12 ,  H05K1/09 ,  H05K1/11

Abstract: A printed circuit board includes an insulating layer, a circuit pattern on the insulating layer, and a surface treatment layer on the circuit pattern. The surface treatment layer includes a bottom surface having a width wider than a width of a top surface of the circuit pattern.

公开(公告)号：US20200146156A1

公开(公告)日：2020-05-07

申请号：US16717679

申请日：2019-12-17

Applicant: LG INNOTEK CO., LTD.

Inventor： Yun Mi BAE ,  Soon Gyu KWON ,  Sang Hwa KIM ,  Sang Young LEE ,  Jin Hak LEE ,  Han Su LEE ,  Dong Hun JEONG ,  In Ho JEONG ,  Dae Young CHOI ,  Jung Ho HWANG

IPC: H05K3/24 ,  H05K1/09 ,  H05K3/18 ,  H05K3/10 ,  H05K1/11

Abstract: A printed circuit board includes an insulating layer, a circuit pattern on the insulating layer, and a surface treatment layer on the circuit pattern. The surface treatment layer includes a bottom surface having a width wider than a width of a top surface of the circuit pattern.