公开(公告)号：US20150044852A1

公开(公告)日：2015-02-12

申请号：US14525228

申请日：2014-10-28

Applicant: NANYA TECHNOLOGY CORP.

Inventor： Chun-I Hsieh ,  Chang-Rong Wu ,  Neng-Tai Shih

IPC: H01L45/00

CPC classification number: H01L45/165 ,  H01L45/08 ,  H01L45/145 ,  H01L45/146 ,  H01L45/1608 ,  H01L45/1641

Abstract: An RRAM includes a resistive layer including a dielectric layer and surplus oxygen ions or nitrogen ions from a treatment on the dielectric layer after the dielectric layer is formed. When the RRAM is applied with a voltage, the oxygen ions or nitrogen ions occupy vacancies in the dielectric layer to increase resistance of the resistive layer. When the RRAM is applied with another voltage, the oxygen ions or nitrogen ions are removed from the vacancies to lower the resistance of the resistive layer.

Abstract translation: RRAM包括在形成介电层之后，在电介质层上的处理中包括电介质层和剩余的氧离子或氮离子的电阻层。 当RRAM被施加电压时，氧离子或氮离子占据电介质层中的空位以增加电阻层的电阻。 当RRAM施加另一电压时，从空位中去除氧离子或氮离子以降低电阻层的电阻。

公开(公告)号：US08999733B2

公开(公告)日：2015-04-07

申请号：US14525228

申请日：2014-10-28

Applicant: Nanya Technology Corp.

Inventor： Chun-I Hsieh ,  Chang-Rong Wu ,  Neng-Tai Shih

IPC: H01L21/00 ,  H01L45/00

CPC classification number: H01L45/165 ,  H01L45/08 ,  H01L45/145 ,  H01L45/146 ,  H01L45/1608 ,  H01L45/1641

Abstract: An RRAM includes a resistive layer including a dielectric layer and surplus oxygen ions or nitrogen ions from a treatment on the dielectric layer after the dielectric layer is formed. When the RRAM is applied with a voltage, the oxygen ions or nitrogen ions occupy vacancies in the dielectric layer to increase resistance of the resistive layer. When the RRAM is applied with another voltage, the oxygen ions or nitrogen ions are removed from the vacancies to lower the resistance of the resistive layer.

Abstract translation: RRAM包括在形成介电层之后，在电介质层上的处理中包括电介质层和剩余的氧离子或氮离子的电阻层。 当RRAM被施加电压时，氧离子或氮离子占据电介质层中的空位以增加电阻层的电阻。 当RRAM施加另一电压时，从空位中去除氧离子或氮离子以降低电阻层的电阻。

公开(公告)号：US09070871B2

公开(公告)日：2015-06-30

申请号：US14529176

申请日：2014-10-31

Applicant: NANYA TECHNOLOGY CORP.

Inventor： Chun-I Hsieh ,  Chang-Rong Wu

IPC: H01L21/00 ,  H01L43/12 ,  B82Y25/00 ,  B82Y40/00 ,  H01F10/32 ,  H01F41/30 ,  H01L43/08 ,  H01L43/02 ,  H01L43/10

CPC classification number: H01L43/12 ,  B82Y25/00 ,  B82Y40/00 ,  G11C11/161 ,  H01F10/3254 ,  H01F41/308 ,  H01L43/02 ,  H01L43/08 ,  H01L43/10

Abstract: A magnetoresistive random access memory (MRAM) element includes a bottom electrode embedded in a first insulating layer; an annular reference layer in a first via hole of a second insulating layer on the first insulating layer, the annular reference layer being situated above the bottom electrode; a first gap fill material layer filling the first via hole; a barrier layer covering the annular reference layer, the second insulating layer and the first gap fill material layer; an annular free layer in a second via hole of a third insulating layer on the second insulating layer, the annular free layer being situated above the annular reference layer; and a top electrode stacked on the annular free layer.

Abstract translation: 磁阻随机存取存储器（MRAM）元件包括嵌入第一绝缘层中的底电极; 在所述第一绝缘层上的第二绝缘层的第一通孔中的环形参考层，所述环形参考层位于所述底部电极的上方; 填充第一通孔的第一间隙填充材料层; 覆盖所述环形基准层，所述第二绝缘层和所述第一间隙填充材料层的阻挡层; 在所述第二绝缘层上的第三绝缘层的第二通孔中的环形自由层，所述环形自由层位于所述环形参考层的上方; 以及堆叠在环形自由层上的顶部电极。

公开(公告)号：US20130252348A1

公开(公告)日：2013-09-26

申请号：US13902877

申请日：2013-05-27

Applicant: NANYA TECHNOLOGY CORP.

Inventor： Chun-I Hsieh ,  Chang-Rong Wu

IPC: H01L43/12

CPC classification number: H01L43/12 ,  B82Y25/00 ,  B82Y40/00 ,  G11C11/161 ,  H01F10/3254 ,  H01F41/308 ,  H01L43/02 ,  H01L43/08 ,  H01L43/10

Abstract: A magnetoresistive random access memory (MRAM) element includes a bottom electrode embedded in a first insulating layer; an annular reference layer in a first via hole of a second insulating layer on the first insulating layer, the annular reference layer being situated above the bottom electrode; a first gap fill material layer filling the first via hole; a barrier layer covering the annular reference layer, the second insulating layer and the first gap fill material layer; an annular free layer in a second via hole of a third insulating layer on the second insulating layer, the annular free layer being situated above the annular reference layer; and a top electrode stacked on the annular free layer.

Abstract translation: 磁阻随机存取存储器（MRAM）元件包括嵌入第一绝缘层中的底电极; 在所述第一绝缘层上的第二绝缘层的第一通孔中的环形参考层，所述环形参考层位于所述底部电极的上方; 填充第一通孔的第一间隙填充材料层; 覆盖所述环形基准层，所述第二绝缘层和所述第一间隙填充材料层的阻挡层; 在所述第二绝缘层上的第三绝缘层的第二通孔中的环形自由层，所述环形自由层位于所述环形参考层的上方; 以及堆叠在环形自由层上的顶部电极。

公开(公告)号：US20150064805A1

公开(公告)日：2015-03-05

申请号：US14529176

申请日：2014-10-31

Applicant: NANYA TECHNOLOGY CORP.

Inventor： Chun-I Hsieh ,  Chang-Rong Wu

IPC: H01L43/12 ,  H01L43/02 ,  H01L43/10

CPC classification number: H01L43/12 ,  B82Y25/00 ,  B82Y40/00 ,  G11C11/161 ,  H01F10/3254 ,  H01F41/308 ,  H01L43/02 ,  H01L43/08 ,  H01L43/10

Abstract: A magnetoresistive random access memory (MRAM) element includes a bottom electrode embedded in a first insulating layer; an annular reference layer in a first via hole of a second insulating layer on the first insulating layer, the annular reference layer being situated above the bottom electrode; a first gap fill material layer filling the first via hole; a barrier layer covering the annular reference layer, the second insulating layer and the first gap fill material layer; an annular free layer in a second via hole of a third insulating layer on the second insulating layer, the annular free layer being situated above the annular reference layer; and a top electrode stacked on the annular free layer.

Abstract translation: 磁阻随机存取存储器（MRAM）元件包括嵌入第一绝缘层中的底电极; 在所述第一绝缘层上的第二绝缘层的第一通孔中的环形参考层，所述环形参考层位于所述底部电极的上方; 填充第一通孔的第一间隙填充材料层; 覆盖所述环形基准层，所述第二绝缘层和所述第一间隙填充材料层的阻挡层; 在所述第二绝缘层上的第三绝缘层的第二通孔中的环形自由层，所述环形自由层位于所述环形参考层的上方; 以及堆叠在环形自由层上的顶部电极。

公开(公告)号：US08916392B2

公开(公告)日：2014-12-23

申请号：US13902877

申请日：2013-05-27

Applicant: Nanya Technology Corp.

Inventor： Chun-I Hsieh ,  Chang-Rong Wu

IPC: H01L21/00 ,  H01L43/12 ,  B82Y25/00 ,  B82Y40/00 ,  H01F10/32 ,  H01F41/30 ,  H01L43/08

CPC classification number: H01L43/12 ,  B82Y25/00 ,  B82Y40/00 ,  G11C11/161 ,  H01F10/3254 ,  H01F41/308 ,  H01L43/02 ,  H01L43/08 ,  H01L43/10

Abstract: A magnetoresistive random access memory (MRAM) element includes a bottom electrode embedded in a first insulating layer; an annular reference layer in a first via hole of a second insulating layer on the first insulating layer, the annular reference layer being situated above the bottom electrode; a first gap fill material layer filling the first via hole; a barrier layer covering the annular reference layer, the second insulating layer and the first gap fill material layer; an annular free layer in a second via hole of a third insulating layer on the second insulating layer, the annular free layer being situated above the annular reference layer; and a top electrode stacked on the annular free layer.

Abstract translation: 磁阻随机存取存储器（MRAM）元件包括嵌入第一绝缘层中的底电极; 在所述第一绝缘层上的第二绝缘层的第一通孔中的环形参考层，所述环形参考层位于所述底部电极的上方; 填充第一通孔的第一间隙填充材料层; 覆盖所述环形基准层，所述第二绝缘层和所述第一间隙填充材料层的阻挡层; 在所述第二绝缘层上的第三绝缘层的第二通孔中的环形自由层，所述环形自由层位于所述环形参考层的上方; 以及堆叠在环形自由层上的顶部电极。