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    Method for singulating hybrid integrated photonic chips
    1.
    发明授权
    Method for singulating hybrid integrated photonic chips 有权
    单片混合集成光子芯片的方法

    公开(公告)号：US09159861B2

    公开(公告)日：2015-10-13

    申请号：US14059288

    申请日：2013-10-21

    Applicant: Oracle International Corporation

    Inventor： Chaoqi Zhang ,  Hiren D. Thacker ,  Ashok V. Krishnamoorthy

    IPC: H01L21/00 ,  H01L31/12 ,  H01L31/18

    CPC classification number: H01L31/12 ,  H01L21/78 ,  H01L31/18

    Abstract: During a fabrication technique, trenches are defined partially through the thickness of a substrate. Then, photonic integrated circuits are coupled to the substrate. These photonic integrated circuits may be in a diving-board configuration, so that they at least partially overlap the trenches. While this may preclude the use of existing dicing techniques, individual hybrid integrated photonic chips (which each include a portion of the substrate and at least one of the photonic integrated circuits) may be singulated from the substrate by: coupling a carrier to a front surface of the substrate; thinning the substrate from a back surface until the partial trenches are reached (for example, by grinding the substrate); attaching a support mechanism (such as tape) to the back surface of the substrate; removing the carrier; and then removing the support mechanism.

    Abstract translation: 在制造技术期间，通过衬底的厚度部分限定沟槽。 然后，光子集成电路耦合到衬底。 这些光子集成电路可以处于潜水板配置中，使得它们至少部分地与沟槽重叠。 虽然这可能排除了使用现有的切割技术，但是可以通过以下方式将单个混合集成光子芯片（其中每个包括基板的一部分和至少一个光子集成电路）分离成：将载体耦合到前表面 的基底; 从背面稀释基板直到达到部分沟槽（例如，通过研磨基板）; 将支撑机构（例如胶带）附接到基板的背面; 移除载体; 然后卸下支撑机构。

    STACKABLE PHOTONIC INTERCONNECT MODULE
    5.
    发明申请
    STACKABLE PHOTONIC INTERCONNECT MODULE 有权

    公开(公告)号：US20140270784A1

    公开(公告)日：2014-09-18

    申请号：US13831519

    申请日：2013-03-14

    Applicant: ORACLE INTERNATIONAL CORPORATION

    Inventor： Hiren D. Thacker ,  Xuezhe Zheng ,  Ashok V. Krishnamoorthy ,  Gary L. Gilbert

    IPC: G02B6/42 ,  H04B10/27

    CPC classification number: G02B6/4284 ,  G02B6/4279 ,  G02B6/43 ,  H04B10/27 ,  H04B10/801

    Abstract: An interconnect module for communicating electrical signals and optical signals is described. In particular, an integrated circuit in the interconnect module receives and transmits the electrical signals with other components in a system that includes the interconnect module via an electrical connector. In addition, the integrated circuit receives and transmits electrical signals to a hybrid silicon-photonic bridge chip that performs electrical-to-optical and optical-to-electrical conversion. In turn, this bridge chip receives and transmits optical signals via an optical fiber. The interconnect module can be remateably connected to a backplane in the system, and can be arranged in a stacked configuration with other instances of the interconnect module. In these ways, the interconnect module facilitates dense, modular or scalable, and compact electrical and optical communication in the system.

    Abstract translation: 描述了用于传送电信号和光信号的互连模块。 特别地，互连模块中的集成电路经由电连接器接收并传输包括互连模块的系统中的其它部件的电信号。 此外，集成电路接收并发送电信号到执行电 - 光和光 - 电转换的混合硅 - 光子桥芯片。 反过来，该桥芯片经由光纤接收和发送光信号。 互连模块可以可重新连接到系统中的背板，并且可以以互连模块的其他实例布置成堆叠配置。 以这些方式，互连模块便于在系统中进行密集，模块化或可缩放的电气和光通信。

    LOW-COST CHIP PACKAGE FOR CHIP STACKS
    6.
    发明申请
    LOW-COST CHIP PACKAGE FOR CHIP STACKS 审中-公开
    芯片堆叠的低成本芯片包

    公开(公告)号：US20140225284A1

    公开(公告)日：2014-08-14

    申请号：US13764622

    申请日：2013-02-11

    Applicant: ORACLE INTERNATIONAL CORPORATION

    Inventor： Hiren D. Thacker ,  Ashok V. Krishnamoorthy ,  John E. Cunningham

    IPC: H01L23/28 ,  H01L21/82

    CPC classification number: H01L23/10 ,  H01L21/561 ,  H01L21/563 ,  H01L21/565 ,  H01L23/3128 ,  H01L25/0657 ,  H01L2224/16225 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06555 ,  H01L2225/06575 ,  H01L2225/06582

    Abstract: A chip package is described. This chip package includes a housing having a surface and a cavity, defined by an edge in the surface, with slots arranged at an angle relative to the surface. For example, the angle may be between 0° (in a plane of the surface) and 90° (perpendicular to the plane). Alternatively, the angle may be 0°. Moreover, the slots may be configured to accommodate a set of semiconductor dies arranged in a stack along a direction perpendicular to a plane of the slots, and the semiconductor dies may be offset from each other in a horizontal direction in the plane of slots so that one side of the stack defines a stepped terrace.

    Abstract translation: 描述了芯片封装。 该芯片封装包括具有由表面中的边缘限定的表面和空腔的壳体，其中相对于表面以一定角度布置。 例如，角度可以在0°（表面的平面）和90°（垂直于平面）之间。 或者，该角度可以是0°。 此外，槽可以被配置为容纳沿着垂直于槽的平面的方向布置在堆叠中的一组半导体管芯，并且半导体管芯可以在槽的平面中在水平方向上彼此偏移，使得 堆叠的一侧限定了阶梯式露台。

    PACKAGED OPTO-ELECTRONIC MODULE
    7.
    发明申请
    PACKAGED OPTO-ELECTRONIC MODULE 有权
    包装光电模块

    公开(公告)号：US20160216445A1

    公开(公告)日：2016-07-28

    申请号：US14605650

    申请日：2015-01-26

    Applicant: Oracle International Corporation

    Inventor： Hiren D. Thacker ,  Ashok V. Krishnamoorthy ,  Xuezhe Zheng ,  John E. Cunningham

    IPC: G02B6/12 ,  H01L23/498 ,  H04B10/80 ,  G02B6/32 ,  G02B6/42 ,  H01L25/16 ,  G02B6/30

    CPC classification number: G02B6/12004 ,  G02B6/30 ,  G02B6/32 ,  G02B6/4219 ,  G02B6/4257 ,  G02B6/4274 ,  G02B2006/12061 ,  G02B2006/12142 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49894 ,  H01L25/167 ,  H01L2224/16225 ,  H01L2924/0002 ,  H01L2924/15311 ,  H04B10/803 ,  H01L2924/00

    Abstract: A chip package includes an optical integrated circuit (such as a hybrid integrated circuit) and an integrated circuit that are proximate to each other in the chip package. The integrated circuit includes electrical circuits that modulate data, communicate data, and serialize/deserialize data, and the optical integrated circuit communicates optical signals with very high bandwidth. Moreover, a front surface of the integrated circuit is electrically coupled to a top surface of an interposer, and a top surface of the integrated circuit is electrically coupled to a front surface of the optical integrated circuit. Furthermore, a bottom surface of the optical integrated circuit faces the top surface of the interposer, and the front surface of the optical integrated circuit is optically coupled to an optical-fiber receptacle, which in turn is optically coupled to an optical-fiber connector.

    Abstract translation: 芯片封装包括在芯片封装中彼此靠近的光学集成电路（例如混合集成电路）和集成电路。 该集成电路包括调制数据，传送数据和串行化/反序列化数据的电路，并且光学集成电路以非常高的带宽传送光信号。 此外，集成电路的前表面电耦合到插入件的顶表面，并且集成电路的顶表面电耦合到光学集成电路的前表面。 此外，光学集成电路的底表面面向插入件的顶表面，并且光学集成电路的前表面光学耦合到光纤插座，光纤插座又与光纤连接器光耦合。

    Reflow-compatible optical I/O assembly adapter
    10.
    发明授权
    Reflow-compatible optical I/O assembly adapter 有权

    公开(公告)号：US10591689B2

    公开(公告)日：2020-03-17

    申请号：US15425887

    申请日：2017-02-06

    Applicant: Oracle International Corporation

    Inventor： Chaoqi Zhang ,  Hiren D. Thacker ,  Ivan Shubin ,  Xuezhe Zheng ,  Ashok V. Krishnamoorthy

    IPC: G02B6/42 ,  G02B6/38

    Abstract: The disclosed embodiments provide an apparatus for connecting one or more optical fibers to an optoelectronic system. This apparatus includes a packaged optoelectronic module (POeM) comprising an optical connector, a silicon photonic (SiP) chip, an integrated circuit (IC) chip, at least one laser chip and a package substrate. The apparatus also includes an assembly adapter enclosing the POeM, wherein the assembly adapter includes a mechanical transfer (MT) ferrule cavity, which includes one or more coarse-alignment structures to guide an MT ferrule enclosing at least one optical fiber during assembly of the apparatus. The assembly adapter is comprised of a solder-reflow-compatible material to facilitate bonding the assembly adapter to a circuit board.

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