公开(公告)号：US20220252660A1

公开(公告)日：2022-08-11

申请号：US17173441

申请日：2021-02-11

Applicant: R & D Circuits, Inc.

Inventor： Donald Eric Thompson ,  Thomas Smith

IPC: G01R31/28 ,  G01R31/70 ,  H05K3/42 ,  H05K3/00

Abstract: The present invention provides a method for detecting failed back-drills in PCBs in the process of fabricating a PCB so that the failed back-drill can be screened out or repaired. The present invention accomplishes this by adding a short to ground connection for every back-drill via that will be cut when the back-drill removes the via stub. If the back-drill is bad or failed the short to ground will fail the subsequent electrical tests. The PCB can be repaired by re-drilling the hole or via. The present invention allows for detecting failed back-drills with easy detection in the manufacturing stage using standard equipment and test procedures. This process creates a simple pass-fail measurement that uses an existing common test process to catch failed back drills in the PCB fabrication facility. This allows for easy and cost-effective repair and guarantees back-drill failures do not pass into the field.

公开(公告)号：US20210376535A1

公开(公告)日：2021-12-02

申请号：US16887640

申请日：2020-05-29

Applicant: R&D Circuits, Inc.

Inventor： Donald Eric Thompson

IPC: H01R13/66 ,  H01R13/17 ,  G01R1/073

Abstract: The present invention provides for an improved method and structure for forming an electrical interconnects mechanism in a Power Distribution Network (PDN) by placing capacitors on the top of the pin array on the printed circuit board (PCB) of the structure to decouple the PDN and results in lower impedance benefitting the frequency range of the PDN effecting a significant performance improvement in the spring-pin inductance from the transmission line. This reduction in impedance reduces the power supply ripple.

公开(公告)号：US20230026067A1

公开(公告)日：2023-01-26

申请号：US17381757

申请日：2021-07-21

Applicant: R&D Circuits

Inventor： Michael Caprio ,  Dwarkesh Patel ,  Hiren Patel ,  Yubing Wong ,  Donald Eric Thompson

IPC: G01R31/28 ,  H05K3/00 ,  H05K3/42

Abstract: The present invention provides a method for detecting and adjusting failed back-drills in PCBs in the process of fabricating a PCB so that the failed back-drill can be screened out or repaired. This is accomplished, by after detecting poor back drills in a PCB, measuring the actual thickness of each PCB board. Next, the measured actual thickness of each PCB board is compared with .the theoretical thickness of each PCB board. The back drill depth for each area of the PCB board is then adjusted for its theoretical thickness and percent variation from the measured thickness.to adjust the poor back drill.

公开(公告)号：US20190141840A1

公开(公告)日：2019-05-09

申请号：US16051772

申请日：2018-08-01

Applicant: R&D Circuits, Inc.

Inventor： Donald Eric Thompson ,  Dhananjaya Turpuseema

IPC: H05K3/42 ,  H05K3/46 ,  H05K1/11

Abstract: A method and structure that forms a PCB while removing or eliminating a stub from a via without back-drilling or doing multi-laminations. In the preferred embodiment, the printed circuit board includes a via extending through a plurality of stacked layers. The via includes a plated through hole that is connected to at least two other metalized layers. There is a portion of the via that is extraneous and that has a negative performance on the functionality of the printed circuit board. The single lamination buried via method adds a seed layer resist that prevents an electrical connection during electroplating thus preventing the via from metalizing where it is not desired.

公开(公告)号：US12153084B2

公开(公告)日：2024-11-26

申请号：US17173441

申请日：2021-02-11

Applicant: R & D Circuits, Inc.

Inventor： Donald Eric Thompson ,  Thomas Smith

IPC: G01R31/28 ,  G01R31/70 ,  H05K3/00 ,  H05K3/42

Abstract: A method for detecting failed back-drills in PCBs in the process of fabricating a PCB so that the failed back-drill can be screened out or repaired. short to ground connection is added for every back-drill via that will be cut when the back-drill removes the via stub. If the back-drill is bad or failed the short to ground will fail the subsequent electrical tests. The PCB can be repaired by re-drilling the hole or via. Failed back-drills may be detected in the manufacturing stage using standard equipment and test procedures. This process creates a simple pass-fail measurement that uses an existing common test process to catch failed back drills in the PCB fabrication facility. This allows for easy and cost-effective repair and guarantees back-drill failures do not pass into the field.

公开(公告)号：US20230180397A1

公开(公告)日：2023-06-08

申请号：US17542867

申请日：2021-12-06

Applicant: R&D Circuits

Inventor： Donald Eric Thompson

IPC: H05K3/42 ,  H05K3/00 ,  H05K3/36 ,  H05K1/18 ,  H05K1/02 ,  C25D7/00 ,  C25D3/38 ,  C25D5/02

CPC classification number: H05K3/426 ,  H05K3/0047 ,  H05K3/368 ,  H05K1/182 ,  H05K1/0222 ,  C25D7/00 ,  C25D3/38 ,  C25D5/02 ,  H05K2201/10325 ,  H05K2201/09072 ,  H05K2201/09545 ,  H05K2203/0723 ,  H05K2201/10409 ,  H05K2201/10303

Abstract: The present invention provides a novel method of constructing a coax spring-pin socket that furnishes better performance and is easier to manufacture in volume using common dielectrics and copper plating. This is accomplished by, in application, a lamination of PCB dielectric layers. This dielectric block is then drilled, plated, etched, and drilled in steps for the construction of a coaxial structure for the signal pins, and a ground structure for ground pins. This design process that can be quickly adjusted and customized for each design.

公开(公告)号：US12135347B2

公开(公告)日：2024-11-05

申请号：US17381757

申请日：2021-07-21

Applicant: R&D Circuits

Inventor： Michael Caprio ,  Dwarkesh Patel ,  Hiren Patel ,  Yubing Wang ,  Donald Eric Thompson

IPC: G01R31/28 ,  H05K3/00 ,  H05K3/42 ,  H05K1/02 ,  H05K1/11

Abstract: The present invention provides a method for detecting and adjusting failed back-drills in PCBs in the process of fabricating a PCB so that the failed back-drill can be screened out or repaired. This is accomplished, by after detecting poor back drills in a PCB, measuring the actual thickness of each PCB board. Next, the measured actual thickness of each PCB board is compared with .the theoretical thickness of each PCB board. The back drill depth for each area of the PCB board is then adjusted for its theoretical thickness and percent variation from the measured thickness to adjust the poor back drill.

公开(公告)号：US12052830B2

公开(公告)日：2024-07-30

申请号：US17542867

申请日：2021-12-06

Applicant: R&D Circuits

Inventor： Donald Eric Thompson

IPC: H05K3/42 ,  C25D3/38 ,  C25D5/02 ,  C25D7/00 ,  H05K1/02 ,  H05K1/18 ,  H05K3/00 ,  H05K3/36

CPC classification number: H05K3/426 ,  C25D3/38 ,  C25D5/02 ,  C25D7/00 ,  H05K1/0222 ,  H05K1/182 ,  H05K3/0047 ,  H05K3/368 ,  H05K2201/09072 ,  H05K2201/09545 ,  H05K2201/10303 ,  H05K2201/10325 ,  H05K2201/10409 ,  H05K2203/0723

Abstract: The present invention provides a novel method of constructing a coax spring-pin socket that furnishes better performance and is easier to manufacture in volume using common dielectrics and copper plating. This is accomplished by, in application, a lamination of PCB dielectric layers. This dielectric block is then drilled, plated, etched, and drilled in steps for the construction of a coaxial structure for the signal pins, and a ground structure for ground pins. This design process that can be quickly adjusted and customized for each design.