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公开(公告)号：US20220132669A1
公开(公告)日：2022-04-28
申请号：US17505730
申请日：2021-10-20
Applicant: Raytheon Company
Inventor： Thomas Sprafke , Stephen Marinsek
Abstract: A chip substrate includes a base substrate having a plurality of base circuit traces mounted thereon for supporting a chip assembly and an intermediate substrate mounted on the base substrate adjacent the plurality of base circuit traces. The intermediate substrate has a plurality of intermediate circuit traces mounted thereon. Each of the plurality of intermediate circuit traces are wirebonded to a respective one of the plurality of base circuit traces and the plurality of intermediate circuit traces are configured to be electrically coupled to an external device. For example, each of the plurality of intermediate circuit traces may be wirebonded to a respective one of a plurality of feedthrough circuit traces mounted on a feedthrough device.
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Patent Agency Ranking
公开(公告)号：US12087704B2
公开(公告)日：2024-09-10
申请号：US17546184
申请日：2021-12-09
Applicant: Raytheon Company
Inventor： Thomas Sprafke , Stephen Marinsek , Christopher Cobb
CPC classification number: H01L23/562 , H01L23/34 , H01L23/36 , H01L27/14634 , H01L27/1469 , G01J3/0202 , H01L23/40
Abstract: A composite structure includes a first surface and a second surface sandwiched together with a field array of individual and discrete pillars extending therebetween. The plurality of discrete pillars each have a tailored coefficient of thermal expansion and are designed to expand and contract over varying temperatures. The discrete pillars are specifically arranged within the composite structure to compensate for the shrinkage and expansion of different components of a microelectronic hybrid device, to reduce thermal expansion induced deformations imparted on facets of the microelectronic hybrid device under varying temperatures.
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公开(公告)号：US11882659B2
公开(公告)日：2024-01-23
申请号：US17505730
申请日：2021-10-20
Applicant: Raytheon Company
Inventor： Thomas Sprafke , Stephen Marinsek
CPC classification number: H05K1/18 , H05K3/32 , H05K1/0306 , H05K1/09 , H05K2201/09036 , H05K2201/10151 , H05K2201/10189 , H05K2201/10287 , H05K2201/10378
Abstract: A chip substrate includes a base substrate having a plurality of base circuit traces mounted thereon for supporting a chip assembly and an intermediate substrate mounted on the base substrate adjacent the plurality of base circuit traces. The intermediate substrate has a plurality of intermediate circuit traces mounted thereon. Each of the plurality of intermediate circuit traces are wirebonded to a respective one of the plurality of base circuit traces and the plurality of intermediate circuit traces are configured to be electrically coupled to an external device. For example, each of the plurality of intermediate circuit traces may be wirebonded to a respective one of a plurality of feedthrough circuit traces mounted on a feedthrough device.
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公开(公告)号：US20210080326A1
公开(公告)日：2021-03-18
申请号：US16574290
申请日：2019-09-18
Applicant: RAYTHEON COMPANY
Inventor： Stephen Marinsek , Thomas Sprafke
Abstract: Aspects and examples described herein provide a lightweight radiation shielding structure for infrared cameras. In one example, a top radiation shielding element and a bottom radiation shielding element are placed as close as possible to an infrared detector to minimize excess weight added to the infrared camera while providing optimal radiation shielding. Such aspects and examples provide important functionality for numerous weight-sensitive applications in high-radiation environments.
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公开(公告)号：US20220246543A1
公开(公告)日：2022-08-04
申请号：US17546184
申请日：2021-12-09
Applicant: Raytheon Company
Inventor： Thomas Sprafke , Stephen Marinsek , Christopher Cobb
IPC: H01L23/00 , H01L27/146
Abstract: A composite structure includes a first surface and a second surface sandwiched together with a field array of individual and discrete pillars extending therebetween. The plurality of discrete pillars each have a tailored coefficient of thermal expansion and are designed to expand and contract over varying temperatures. The discrete pillars are specifically arranged within the composite structure to compensate for the shrinkage and expansion of different components of a microelectronic hybrid device, to reduce thermal expansion induced deformations imparted on facets of the microelectronic hybrid device under varying temperatures.
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公开(公告)号：US11209317B2
公开(公告)日：2021-12-28
申请号：US16574290
申请日：2019-09-18
Applicant: RAYTHEON COMPANY
Inventor： Stephen Marinsek , Thomas Sprafke
Abstract: Aspects and examples described herein provide a lightweight radiation shielding structure for infrared cameras. In one example, a top radiation shielding element and a bottom radiation shielding element are placed as close as possible to an infrared detector to minimize excess weight added to the infrared camera while providing optimal radiation shielding. Such aspects and examples provide important functionality for numerous weight-sensitive applications in high-radiation environments.
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