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公开(公告)号:US09235487B2
公开(公告)日:2016-01-12
申请号:US14509820
申请日:2014-10-08
Applicant: SK hynix Inc.
Inventor: Jeongsu Jeong , Youncheul Kim , Hyunsu Yoon , Yonggu Kang , Kwidong Kim , Jeongtae Hwang
CPC classification number: G06F11/2094 , G06F2201/85 , G11C7/20 , G11C29/4401 , G11C29/785 , G11C29/789 , G11C29/802 , G11C2029/4402
Abstract: A memory device includes a boot-up control unit configured to control a start of boot-up operation by starting the boot-up operation when an initialization signal is activated, and ignore the initialization signal after a complete signal is activated, a nonvolatile memory unit configured to store repair data, and output the stored repair data during the boot-up operation, a plurality of registers configured to store the repair data outputted from the nonvolatile memory unit, a plurality of memory banks configured to replace a normal cell with a redundant cell, using the repair data stored in the corresponding registers among the plurality of resistors, and a verification unit configured to generate the complete signal to notify that the boot-up operation is completed.
Abstract translation: 存储装置包括启动控制单元,其被配置为通过在初始化信号被激活时启动启动操作来控制启动操作的开始,并且在完成信号被激活之后忽略初始化信号,非易失性存储器单元 被配置为存储修复数据,并且在引导操作期间输出所存储的修复数据;多个寄存器,被配置为存储从非易失性存储器单元输出的修复数据;多个存储器组,被配置为用冗余代替正常单元 使用存储在多个电阻器中的相应寄存器中的修复数据的单元,以及被配置为生成完成信号以通知启动操作完成的验证单元。
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公开(公告)号:US08817519B2
公开(公告)日:2014-08-26
申请号:US13672408
申请日:2012-11-08
Applicant: SK hynix Inc.
Inventor: Jeongsu Jeong , Youncheul Kim , Hyunsu Yoon , Yonggu Kang , Igsoo Kwon , Yeonuk Kim
Abstract: An integrated circuit includes a high voltage generator generating a high voltage, a negative voltage generator generating a negative voltage, a divided voltage generator generating a divided voltage by dividing the power source voltage and supplying it to a read voltage terminal, a first power gate supplying the high voltage or the divided voltage to a program voltage terminal, a second power gate supplying the negative voltage or the ground voltage to a deactivation voltage terminal, a third power gate supplying the ground voltage or the divided voltage to an activation voltage terminal, and an e-fuse array circuit operating using voltage of the program voltage terminal as a program voltage, voltage of the divided voltage terminal as a read voltage, voltage of the activation voltage terminal as an activation voltage, and voltage of the deactivation voltage terminal as a deactivation voltage.
Abstract translation: 集成电路包括产生高电压的高压发生器,产生负电压的负电压发生器,分压电压发生器,通过分压电源电压产生分压,并将其提供给读电压端;第一供电电源 向编程电压端子施加高电压或分压,向停用电压端子提供负电压或接地电压的第二电源栅极,将接地电压或分压电压提供给激活电压端子的第三电源栅极,以及 使用编程电压端子的电压作为编程电压工作的电熔丝阵列电路,作为读取电压的分压电压端子的电压,作为激活电压的激活电压端子的电压,以及去激活电压端子的电压为 去激活电压。
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公开(公告)号:US08885424B2
公开(公告)日:2014-11-11
申请号:US13672140
申请日:2012-11-08
Applicant: SK Hynix Inc.
Inventor: Jeongsu Jeong , Youncheul Kim , Hyunsu Yoon , Yonggu Kang , Kwidong Kim , Jeongtae Hwang
IPC: G11C7/10
CPC classification number: G06F11/2094 , G06F2201/85 , G11C7/20 , G11C29/4401 , G11C29/785 , G11C29/789 , G11C29/802 , G11C2029/4402
Abstract: A memory device includes a boot-up control unit configured to control a start of boot-up operation by starting the boot-up operation when an initialization signal is activated, and ignore the initialization signal after a complete signal is activated, a nonvolatile memory unit configured to store repair data, and output the stored repair data during the boot-up operation, a plurality of registers configured to store the repair data outputted from the nonvolatile memory unit, a plurality of memory banks configured to replace a normal cell with a redundant cell, using the repair data stored in the corresponding registers among the plurality of resistors, and a verification unit configured to generate the complete signal to notify that the boot-up operation is completed.
Abstract translation: 存储装置包括启动控制单元,其被配置为通过在初始化信号被激活时启动启动操作来控制启动操作的开始,并且在完成信号被激活之后忽略初始化信号,非易失性存储器单元 被配置为存储修复数据,并且在引导操作期间输出所存储的修复数据;多个寄存器,被配置为存储从非易失性存储器单元输出的修复数据;多个存储器组,被配置为用冗余代替正常单元 使用存储在多个电阻器中的相应寄存器中的修复数据的单元,以及被配置为生成完成信号以通知启动操作完成的验证单元。
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