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    Heat dissipation substrate and fabricating method thereof
    1.
    发明授权
    Heat dissipation substrate and fabricating method thereof 有权

    公开(公告)号：US10957614B2

    公开(公告)日：2021-03-23

    申请号：US16586913

    申请日：2019-09-28

    Applicant: Subtron Technology Co., Ltd.

    Inventor： Chien-Hung Wu ,  Tzu-Shih Shen

    IPC: H01L23/14 ,  H01L23/373 ,  H01L21/48

    Abstract: A heat dissipation substrate includes an insulating layer, a metal heat dissipation block, and a patterned structure layer. The insulating layer has a first surface, a second surface and at least one through hole. The metal heat dissipation block passes through the insulating layer from the second surface of the insulating layer and has an upper surface, a lower surface, and a contact surface. There is a first vertical height between the contact surface and the lower surface. The patterned structure layer includes a patterned circuit layer and at least one conductive structure layer. The patterned circuit layer is disposed on the first surface of the insulating layer, and the conductive structure layer is connected to the patterned circuit layer and extends to cover an inner wall of the through hole. The patterned circuit layer has a top surface, the conductive structure layer has a bottom surface. There is a second vertical height between the top surface and the first surface, and the first vertical height is 3 times to 300 times the second vertical height.

    HEAT DISSIPATION SUBSTRATE AND FABRICATING METHOD THEREOF
    2.
    发明申请
    HEAT DISSIPATION SUBSTRATE AND FABRICATING METHOD THEREOF 审中-公开

    公开(公告)号：US20200303271A1

    公开(公告)日：2020-09-24

    申请号：US16586913

    申请日：2019-09-28

    Applicant: Subtron Technology Co., Ltd.

    Inventor： Chien-Hung Wu ,  Tzu-Shih Shen

    IPC: H01L23/14 ,  H01L23/373 ,  H01L21/48

    Abstract: A heat dissipation substrate includes an insulating layer, a metal heat dissipation block, and a patterned structure layer. The insulating layer has a first surface, a second surface and at least one through hole. The metal heat dissipation block passes through the insulating layer from the second surface of the insulating layer and has an upper surface, a lower surface, and a contact surface. There is a first vertical height between the contact surface and the lower surface. The patterned structure layer includes a patterned circuit layer and at least one conductive structure layer. The patterned circuit layer is disposed on the first surface of the insulating layer, and the conductive structure layer is connected to the patterned circuit layer and extends to cover an inner wall of the through hole. The patterned circuit layer has a top surface, the conductive structure layer has a bottom surface. There is a second vertical height between the top surface and the first surface, and the first vertical height is 3 times to 300 times the second vertical height.

    Package substrate and manufacturing method thereof
    3.
    发明授权
    Package substrate and manufacturing method thereof 有权

    公开(公告)号：US10123413B2

    公开(公告)日：2018-11-06

    申请号：US15594673

    申请日：2017-05-15

    Applicant: Subtron Technology Co., Ltd.

    Inventor： Chih-Hong Chuang ,  Chien-Hung Wu

    IPC: H05K3/00 ,  H01K1/00 ,  H05K1/09 ,  H01L23/498 ,  H01L21/48 ,  H01L21/683 ,  H05K3/46 ,  H05K1/02 ,  H05K1/11 ,  H05K3/18 ,  H05K3/40 ,  H05K3/20 ,  H05K3/42

    Abstract: A temporary package substrate includes a first copper layer, a second copper layer, a third copper layer, a first plating copper layer, a second plating copper layer, a third plating copper layer, a first dielectric layer, a second dielectric layer and two circuit structures. The second copper layer is located between the first and the third copper layers, and edges of the second copper layer are retracted a distance compared to edges of the first copper layer and edges of the third copper layer. The first and the second dielectric layers completely encapsulate the edges of the second copper layer and the edges of the second plating copper layer. Each of the circuit structures includes at least two patterned circuit layers, an insulation layer located between the patterned circuit layers, and a plurality of conductive through hole structures penetrating the insulation layer and electrically connected with the patterned circuit layers.

    PACKAGE SUBSTRATE AND MANUFACTURING METHOD THEREOF
    5.
    发明申请
    PACKAGE SUBSTRATE AND MANUFACTURING METHOD THEREOF 有权
    包装基板及其制造方法

    公开(公告)号：US20170006713A1

    公开(公告)日：2017-01-05

    申请号：US14846991

    申请日：2015-09-07

    Applicant: Subtron Technology Co., Ltd.

    Inventor： Chih-Hong Chuang ,  Chien-Hung Wu

    IPC: H05K3/46 ,  H05K1/11 ,  H05K1/09 ,  H05K1/02 ,  H05K3/18 ,  H05K3/40

    CPC classification number: H05K1/09 ,  H01L21/4857 ,  H01L21/6835 ,  H01L23/49822 ,  H01L2221/68345 ,  H01L2221/68381 ,  H05K1/0298 ,  H05K1/115 ,  H05K3/0026 ,  H05K3/0047 ,  H05K3/007 ,  H05K3/18 ,  H05K3/205 ,  H05K3/4038 ,  H05K3/421 ,  H05K3/4638 ,  H05K3/4644 ,  H05K3/4682 ,  H05K2201/09509 ,  H05K2203/03

    Abstract: A method of manufacturing a package substrate is provided. A first copper layer and a first plating copper layer formed thereon, a first dielectric layer, a second copper layer and a second plating copper layer formed thereon, a second dielectric layer, a third copper layer and a third plating copper layer formed thereon are provided and laminated, so that the first and the second dielectric layers encapsulate edges of the second copper layer and the second plating copper layer to form a temporary carrier. Two circuit structures are formed on two opposite surfaces of the temporary carrier. The temporary carrier and the circuit structures are cut to expose the edges of the second copper layer and the second plating copper layer, and separated along the exposed edges of the second copper layer and the second plating copper layer to form two package substrates independent from each other.

    Abstract translation: 提供一种制造封装基板的方法。 提供了形成在其上的第一铜层和第一电镀铜层，形成在其上的第一电介质层，第二铜层和第二电镀铜层，形成在其上的第二电介质层，第三铜层和第三电镀铜层 并且层叠，使得第一和第二电介质层封装第二铜层和第二电镀铜层的边缘以形成临时载体。 在临时载体的两个相对的表面上形成两个电路结构。 切割临时载体和电路结构以暴露第二铜层和第二镀铜层的边缘，并沿着第二铜层和第二镀铜层的暴露边缘分离以形成独立于每个的两个封装衬底 其他。

    HEAT DISSIPATION SUBSTRATE
    6.
    发明公开
    HEAT DISSIPATION SUBSTRATE 审中-公开

    公开(公告)号：US20230403826A1

    公开(公告)日：2023-12-14

    申请号：US17860076

    申请日：2022-07-07

    Applicant: Subtron Technology Co., Ltd.

    Inventor： Chung Ying Lu ,  Tzu-Shih Shen ,  Chien-Hung Wu

    IPC: H05K7/20 ,  H05K1/03 ,  H05K1/02

    CPC classification number: H05K7/20409 ,  H05K1/0306 ,  H05K1/0212

    Abstract: A heat dissipation substrate includes heat dissipation blocks, an insulation filling structure, a first insulating layer, and a first circuit layer. Each heat dissipation block includes a first surface and a second surface opposite to the first surface. The insulation filling structure is disposed between the heat dissipation blocks to laterally connect the heat dissipation blocks. A first insulating surface of the insulation filling structure is substantially coplanar with the first surface of the heat dissipation block. A second insulating surface of the insulation filling structure is substantially coplanar with the second surface of the heat dissipation block. The first insulating layer is disposed on the first surface. The first circuit layer is disposed on the first insulating layer and penetrates the first insulating layer to be connected with the heat dissipation blocks. A thickness of the heat dissipation blocks is greater than a thickness of the first circuit layer.

    Heat dissipation substrate and manufacturing method thereof
    7.
    发明授权
    Heat dissipation substrate and manufacturing method thereof 有权

    公开(公告)号：US11171072B2

    公开(公告)日：2021-11-09

    申请号：US16898417

    申请日：2020-06-10

    Applicant: Subtron Technology Co., Ltd.

    Inventor： Chien-Hung Wu ,  Bo-Yu Huang ,  Chia-Wei Chang ,  Tzu-Shih Shen

    IPC: H01L23/367 ,  H05K1/02 ,  H01L33/64 ,  H01L21/48 ,  H01L23/498

    Abstract: A heat dissipation substrate includes a substrate, a heat conducting element, an insulating filling material, a first circuit layer, and a second circuit layer. The substrate has a first surface, a second surface opposite the first surface, and a through groove communicating the first surface with the second surface. The heat conducting element is disposed in the through groove. The heat conducting element includes an insulating material layer and at least one metal layer. The insulating filling material is filled in the through groove for fixing the heat conducting element into the through groove. The first circuit layer is disposed on the first surface of the substrate and exposes a portion of the heat conducting element. The second circuit layer is disposed on the second surface of the substrate. The first circuit layer and the metal layer are respectively disposed on two opposite sides of the insulating material layer.

    HEAT DISSIPATION SUBSTRATE AND MANUFACTURING METHOD THEREOF
    8.
    发明申请
    HEAT DISSIPATION SUBSTRATE AND MANUFACTURING METHOD THEREOF 有权

    公开(公告)号：US20210050276A1

    公开(公告)日：2021-02-18

    申请号：US16898417

    申请日：2020-06-10

    Applicant: Subtron Technology Co., Ltd.

    Inventor： Chien-Hung Wu ,  Bo-Yu Huang ,  Chia-Wei Chang ,  Tzu-Shih Shen

    IPC: H01L23/367 ,  H01L33/64 ,  H01L23/498 ,  H01L21/48

    Abstract: A heat dissipation substrate includes a substrate, a heat conducting element, an insulating filling material, a first circuit layer, and a second circuit layer. The substrate has a first surface, a second surface opposite the first surface, and a through groove communicating the first surface with the second surface. The heat conducting element is disposed in the through groove. The heat conducting element includes an insulating material layer and at least one metal layer. The insulating filling material is filled in the through groove for fixing the heat conducting element into the through groove. The first circuit layer is disposed on the first surface of the substrate and exposes a portion of the heat conducting element. The second circuit layer is disposed on the second surface of the substrate. The first circuit layer and the metal layer are respectively disposed on two opposite sides of the insulating material layer.

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