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公开(公告)号:US20240015887A1
公开(公告)日:2024-01-11
申请号:US18255853
申请日:2021-12-14
Applicant: Tesla, Inc.
Inventor: Jin Zhao , Satyan Chandra , Shishuang Sun
CPC classification number: H05K1/113 , H05K3/3436 , H05K3/3442 , H05K3/328 , H05K2201/10636 , H05K2201/10734 , H05K2201/10015 , H05K2203/101 , H05K2203/107
Abstract: A structure with an electronic component array positioned between two stacked printed circuit boards (600,606) is disclosed. The electronic components (502) of the array can be connected to the printed circuit board (600,606) by way of solder connections. Example electronic components (502) include capacitors. Related methods of manufacture are disclosed that involve applying heat to a solder paste array on a printed circuit board (600,606) to form solid conductors electrically connected to the electronic components (502).
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公开(公告)号:US11570889B2
公开(公告)日:2023-01-31
申请号:US17247989
申请日:2021-01-04
Applicant: Tesla, Inc.
Inventor: Mohamed Nasr , Aydin Nabovati , Jin Zhao
Abstract: A high-power Voltage Regulator Module (VRM) includes a housing having side walls, an upper opening, and a lower opening, a VRM circuit board oriented within the housing, a plane of the VRM circuit board oriented in a parallel to at least one of the side walls of the housing, an upper Printed Circuit Board (PCB) coupled to the upper opening of the housing, a lower panel coupled to the lower opening of the housing, a coolant inlet port formed in the lower panel, and a coolant outlet port formed in the lower panel. The high power VRM may include a coolant inlet adapter coupled to the coolant inlet port and a coolant outlet adapter coupled to the coolant outlet port. The coolant inlet adapted and the coolant outlet adapter may provide support for the VRM.
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公开(公告)号:US20210127483A1
公开(公告)日:2021-04-29
申请号:US17247989
申请日:2021-01-04
Applicant: Tesla, Inc.
Inventor: Mohamed Nasr , Aydin Nabovati , Jin Zhao
Abstract: A high-power Voltage Regulator Module (VRM) includes a housing having side walls, an upper opening, and a lower opening, a VRM circuit board oriented within the housing, a plane of the VRM circuit board oriented in parallel to at least one of the side walls of the housing, an upper Printed Circuit Board (PCB) coupled to the upper opening of the housing, a lower panel coupled to the lower opening of the housing, a coolant inlet port formed in the lower panel, and a coolant outlet port formed in the lower panel. The high power VRM may include a coolant inlet adapter coupled to the coolant inlet port and a coolant outlet adapter coupled to the coolant outlet port. The coolant inlet adapter and the coolant outlet adapter may provide support for the VRM.
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公开(公告)号:US20240370070A1
公开(公告)日:2024-11-07
申请号:US18683342
申请日:2022-08-15
Applicant: Tesla, Inc.
Inventor: Jin Zhao , Shishuang Sun , Yang Sun , Vijaykumar Krithivasan , William Chang , Jianjun Li
IPC: G06F1/26
Abstract: Aspects of this disclosure relate to power delivery to chips in an array. An array of power conversion paths can be positioned vertically relative to the chips of the array. A power conversion path can convert a high voltage, low current signal to a low voltage, high current. The power conversion path can include a first power conversion stage and a second power conversion stage. The power conversion path can be implemented in a power supply module, for example.
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公开(公告)号:US20240357769A1
公开(公告)日:2024-10-24
申请号:US18683408
申请日:2022-08-16
Applicant: Tesla, Inc.
Inventor: Shishuang Sun , Ganesh Venkataramanan , Yang Sun , Jin Zhao , Shaowei Deng , William Chang , Mengzhi Pang , Steven Butler , William Arthur McGee , Aydin Nabovati
IPC: H05K7/20
CPC classification number: H05K7/205
Abstract: The systems, methods, and devices disclosed herein relate to a multi-layer structures arranged in a vertically orientation. In some embodiments, a computing assembly can include a first cooling system, a first electronics layer, a second cooling system, and a second electronics layer. The first cooling system can be disposed on top of and can be in thermal communication with the first electronics layer. The first electronics layer array includes an array of integrated circuit dies that are in electronic communication with each other in a plane that is orthogonal to power delivery. The first electronics layer can be disposed on top of and can be in thermal communication with the second cooling system, and the second cooling system can be disposed on top of and can be in thermal communication with the second electronics layer. The second electronics layer includes an array of power delivery modules. In some embodiments, at least one layer can use system on wafer packaging.
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公开(公告)号:US20190297723A1
公开(公告)日:2019-09-26
申请号:US16356037
申请日:2019-03-18
Applicant: Tesla, Inc.
Inventor: Mohamed Nasr , Aydin Nabovati , Jin Zhao
Abstract: A high-power Voltage Regulator Module (VRM) includes a housing having side walls, an upper opening, and a lower opening, a VRM circuit board oriented within the housing, a plane of the VRM circuit board oriented in parallel to at least one of the side walls of the housing, an upper Printed Circuit Board (PCB) coupled to the upper opening of the housing, a lower panel coupled to the lower opening of the housing, a coolant inlet port formed in the lower panel, and a coolant outlet port formed in the lower panel. The high power VRM may include a coolant inlet adapter coupled to the coolant inlet port and a coolant outlet adapter coupled to the coolant outlet port. The coolant inlet adapter and the coolant outlet adapter may provide support for the VRM.
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公开(公告)号:US20240353905A1
公开(公告)日:2024-10-24
申请号:US18683469
申请日:2022-08-15
Applicant: Tesla, Inc.
Inventor: Jin Zhao , Raghuvir Ramachandran , Shishuang Sun , William Chang , Timothy Fischer
IPC: G06F1/26
CPC classification number: G06F1/26
Abstract: Systems and methods of for vertical power and clock delivery are disclosed. In some embodiments, a computing system can include an array of chips comprising a chip and a power delivery module configured to provide a power supply voltage and one or more clock signals to the chip, the power delivery module being positioned vertically relative to the chip, and the chip configured to vertically receive the one or more clock signals from the power delivery module.
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公开(公告)号:US11122678B2
公开(公告)日:2021-09-14
申请号:US16735573
申请日:2020-01-06
Applicant: Tesla, Inc.
Inventor: Vijaykumar Krithivasan , Jin Zhao , Mengzhi Pang , Steven Wayne Butler , Ganesh Venkataramanan , Yang Sun
Abstract: A structure having imbedded array of components is described. An example structure includes an imbedded component array layer having an array of imbedded passive devices contained therein. The structure further includes an Integrated Fan-Out (InFO) layer residing adjacent a first surface of the imbedded component array layer having traces and vias formed therein. The structure further includes an insulator layer residing adjacent a second surface of the imbedded component array layer and electrically coupled to at least the InFO layer and vias passing through the imbedded component array layer and electrically coupled to some of vias of the InFO layer.
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公开(公告)号:US10887982B2
公开(公告)日:2021-01-05
申请号:US16356037
申请日:2019-03-18
Applicant: Tesla, Inc.
Inventor: Mohamed Nasr , Aydin Nabovati , Jin Zhao
Abstract: A high-power Voltage Regulator Module (VRM) includes a housing having side walls, an upper opening, and a lower opening, a VRM circuit board oriented within the housing, a plane of the VRM circuit board oriented in parallel to at least one of the side walls of the housing, an upper Printed Circuit Board (PCB) coupled to the upper opening of the housing, a lower panel coupled to the lower opening of the housing, a coolant inlet port formed in the lower panel, and a coolant outlet port formed in the lower panel. The high power VRM may include a coolant inlet adapter coupled to the coolant inlet port and a coolant outlet adapter coupled to the coolant outlet port. The coolant inlet adapter and the coolant outlet adapter may provide support for the VRM.
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公开(公告)号:US20200221568A1
公开(公告)日:2020-07-09
申请号:US16735573
申请日:2020-01-06
Applicant: Tesla, Inc.
Inventor: Jin Zhao , Vijaykumar Krithivasan , Mengzhi Pang , Steven Wayne Butler , Ganesh Venkataramanan , Yang Sun
Abstract: A structure having embedded array of components is described. An example structure includes an imbedded component array layer having an array of imbedded passive devices contained therein. The structure further includes an Integrated Fan-Out (InFO) layer residing adjacent a first surface of the imbedded component array layer having traces and vias formed therein. The structure further includes an insulator layer residing adjacent a second surf ace of the imbedded component array layer and electrically coupled to at least the InFO layer and vias passing through the imbedded component array layer and electrically coupled to some of vias of the InFO layer.
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