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    ARRAY OPERATION USING A SCHOTTKY DIODE AS A NON-OHMIC SELECTION DEVICE
    1.
    发明申请
    ARRAY OPERATION USING A SCHOTTKY DIODE AS A NON-OHMIC SELECTION DEVICE 审中-公开
    使用肖特基二极管作为非OHMIC选择器件的阵列操作

    公开(公告)号：US20140014893A1

    公开(公告)日：2014-01-16

    申请号：US14025714

    申请日：2013-09-12

    Applicant: Unity Semiconductor Corporation

    Inventor： Roy Lambertson ,  Lawrence Schloss

    IPC: H01L45/00

    CPC classification number: H01L45/146 ,  G11C11/36 ,  G11C13/003 ,  G11C29/006 ,  G11C2213/71 ,  G11C2213/76 ,  H01L27/101 ,  H01L27/1021

    Abstract: A two-terminal memory cell including a Schottky metal-semiconductor contact as a selection device (SD) allows selection of two-terminal cross-point memory array operating voltages that eliminate “half-select leakage current” problems present when other types of non-ohmic devices are used. The SD structure can comprise a “metal/oxide semiconductor/metal” or a “metal/lightly-doped single layer polycrystalline silicon.” The memory cell can include a two-terminal memory element including at least one conductive oxide layer (e.g., a conductive metal oxide—CMO, such as a perovskite or a conductive binary oxide) and an electronically insulating layer (e.g., yttria-stabilized zirconia—YSZ) in contact with the CMO. The SD can be included in the memory cell and configured electrically in series with the memory element. The memory cell can be positioned in a two-terminal cross-point array between a pair of conductive array lines (e.g., a bit line and a word line) across which voltages for data operations are applied.

    Abstract translation: 包括肖特基金属 - 半导体触点作为选择装置（SD）的双端存储单元允许选择两端交叉点存储阵列工作电压，以消除当其它类型的非 - 使用欧姆器件。 SD结构可以包括“金属/氧化物半导体/金属”或“金属/轻掺杂单层多晶硅”。 存储器单元可以包括包括至少一个导电氧化物层（例如，导电金属氧化物-CMO，例如钙钛矿或导电二元氧化物）的两端存储元件和电绝缘层（例如，氧化钇稳定的氧化锆 -YSZ）与CMO接触。 SD可以被包括在存储单元中并与存储元件串联构造。 存储器单元可以位于一对导电阵列线（例如，位线和字线）之间的两端交叉点阵列中，用于数据操作的电压被施加在该两端交叉点阵列上。

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