公开(公告)号：US20200035794A1

公开(公告)日：2020-01-30

申请号：US16521311

申请日：2019-07-24

Applicant: Winbond Electronics Corp.

Inventor： Jian-Ting CHEN ,  Yao-Ting TSAI ,  Jung-Ho CHANG ,  Hsiu-Han LIAO

IPC: H01L21/28 ,  H01L27/11521 ,  H01L27/11531 ,  H01L29/423 ,  H01L29/49 ,  H01L21/3215 ,  H01L21/311 ,  H01L29/788 ,  H01L29/66

Abstract: A non-volatile memory device and its manufacturing method are provided. The method includes the following steps. A plurality of isolation structures are formed in a substrate. A first polycrystalline silicon layer is formed in the substrate and between two adjacent isolation structures. A first implantation process is performed to implant a first dopant into the first polycrystalline silicon layer and the isolation structures. A portion of each of the isolation structures is partially removed, and the remaining portion of each of the isolation structures has a substantially flat top surface. An annealing process is performed after partially removing the isolation structures to uniformly diffuse the first dopant in the first polycrystalline silicon layer. A dielectric layer is formed on the first polycrystalline silicon layer, and a second polycrystalline silicon layer is formed on the dielectric layer.

公开(公告)号：US20250079315A1

公开(公告)日：2025-03-06

申请号：US18677434

申请日：2024-05-29

Applicant: Winbond Electronics Corp.

Inventor： Jian-Ting CHEN ,  Yao-Ting TSAI ,  Bo-Lun WU ,  Sih-Han CHEN

IPC: H01L23/532 ,  H01L21/768 ,  H01L23/528

Abstract: The method for forming the semiconductor structure includes the following steps. A substrate that is divided into a cell region and a peripheral region is provided. A bottom dielectric layer is formed on the substrate. A first stacked structure and a second stacked structure are formed on the bottom dielectric layer. The first stacked structure is disposed in the cell region and the second stacked structure is disposed in the peripheral region. The first stacked structure is patterned to form first conductive stacks. A first cleaning process is performed. A first repair dielectric layer is formed on the first conductive stacks, the second stacked structure, and the bottom dielectric layer. The second stacked structure is patterned to form second conductive stacks. A second cleaning process is performed. A second repair dielectric layer is formed on the first conductive stacks, the second conductive stacks, and the bottom dielectric layer.

公开(公告)号：US20210151447A1

公开(公告)日：2021-05-20

申请号：US17061442

申请日：2020-10-01

Applicant: Winbond Electronics Corp.

Inventor： Che-Fu CHUANG ,  Jian-Ting CHEN ,  Yu-Kai LIAO ,  Hsiu-Han LIAO

IPC: H01L27/11517 ,  H01L29/66

Abstract: A method for manufacturing a memory device is provided. The method includes the following steps: providing a substrate; forming a plurality of first gate structures; forming a lining layer on the substrate; forming a spacer layer on the lining layer; forming a stop layer on the spacer layer; forming a first sacrificial layer on the stop layer; removing a portion of the first sacrificial layer to expose the stop layer on the first gate structures, and to expose the stop layer at the bottoms of the trenches; removing the stop layer at the bottoms of the trenches to expose the spacer layer; removing the remaining first sacrificial layer; forming a second sacrificial layer on the substrate; and removing the second sacrificial layer, and removing the spacer layer and the lining layer at the bottoms of the plurality of trenches to expose the substrate.