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1.发明申请
公开(公告)号：WO03005288A2
公开(公告)日：2003-01-16
申请号：PCT/GB0202762
申请日：2002-06-18
Inventor： BASSO CLAUDE , CALVIGNAC JEAN LOUIS , DAMON PHILIPPE , DAVIS GORDON TAYLOR , HEDDES MARCO , JEFFRIES CLARK DEBS
CPC classification number: G06F17/30985 , H04L29/12132 , H04L29/12594 , H04L61/1552 , H04L61/30 , Y10S707/99933 , Y10S707/99942
Abstract: A method and system is disclosed for performing a pattern match search for a data string having a plurality of characters separated by delimiters. A search key is constructed by generating a full match search increment comprising the binary representation of a data string element, wherein the data string element comprises all characters between a pair of delimiters. The search key is completed by concatenating a pattern search prefix to the full match search increment, wherein the pattern search prefix is a cumulative pattern search result of each previous full match search increment. A full match search is then performed within a lookup table utilizing the search key. In response to finding a matching pattern within the lookup table, the process returns to constructing a next search key. In response to not finding a matching pattern, the previous full match search result is utilized to process the data string.
Abstract translation: 公开了一种用于对具有由分隔符分隔的多个字符的数据串执行模式匹配搜索的方法和系统。 通过生成包括数据串元素的二进制表示的全匹配搜索增量来构造搜索关键字，其中数据串元素包括一对分隔符之间的所有字符。 通过将模式搜索前缀连接到全匹配搜索增量来完成搜索关键字，其中模式搜索前缀是每个先前全匹配搜索增量的累积模式搜索结果。 然后使用搜索关键字在查找表内执行完全匹配搜索。 响应于在查找表内找到匹配模式，该过程返回到构建下一个搜索关键字。 响应于没有找到匹配模式，先前的完全匹配搜索结果被用于处理数据串。
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2.发明申请METHOD AND SYSTEMS FOR OPTIMIZING ADSL CONNECTIONS IN DSL ACCESS MULTIPLEXOR 审中-公开用于在DSL接入多路复用器中优化ADSL连接的方法和系统
公开(公告)号：WO03081942A8
公开(公告)日：2004-09-10
申请号：PCT/EP0303248
申请日：2003-03-10
Applicant: IBM , IBM FRANCE , ELEFTHERIOU EVANGELOS S , OELCER SEDAT , ABDELILAH YOUSSEF , DAVIS GORDON TAYLOR , DERBY JEFF H , HWANG DONGMING , WARE MALCOLM , YE HUA
Inventor： ELEFTHERIOU EVANGELOS S , OELCER SEDAT , ABDELILAH YOUSSEF , DAVIS GORDON TAYLOR , DERBY JEFF H , HWANG DONGMING , WARE MALCOLM , YE HUA
CPC classification number: H04Q11/00 , H04M11/062 , H04Q2213/13003 , H04Q2213/13039 , H04Q2213/1308 , H04Q2213/13099 , H04Q2213/13199 , H04Q2213/13332
Abstract: A method and systems for optimizing Asymmetric Digital Subscriber Line (ADSL) connections in DSL Access Multiplexor (DSLAM) that marries benefits of G.dmt and G.lite standards, using a flexible method implemented on a programmable Digital Signal Processor (DSP) and a Network Processor (NP) is disclosed. It provides a means to support full G.dmt rates for any of the attached users as long as less than half the users are actively moving data through the DSLAM, but by only using half the digital signal processing hardware and half the power consumption for the line drivers. The invention allows doubling the number of,ADSL ports available over a conventional scheme given about 20% more power is under 50% with only half the respective connections, all those G.dmt rates possible on their exceeds 50%, gradually active G.lite rates based on either based on a tiered tariff structure, until ultimately, when the utilization reaches 100%, all subscribers will be forced back to a maximum rate afforded by G.lite. Only as utilization drops back off, will active subscribers be brought back up to G.dmt's maximum transmission rates. Once the utilization drops below 50% again, then all active subscribers will be able to utilize G.dmt's maximum transmission rates. budget. When the utilization subscribers active on their users experience the maximum wire. However, when utilization subscribers start to experience a fixed policy or one that is based on a tiered tariff structure, until ultimately, when the utilization reaches 100%, all subscribers will be forced back to a maximum rate afforded by G.lite. Only as utilization drops back off, will active subscribers be brought back up to G.dmt's maximum transmission rates. Once the utilization drops below 50% again, then all active subscribers will be able to utilize G.dmt's maximum transmission rates.
Abstract translation: 一种用于优化DSL访问多路复用器（DSLAM）中的非对称数字用户线路（ADSL）连接的方法和系统，其使用G.dmt和G.lite标准的优点，使用在可编程数字信号处理器（DSP）和 网络处理器（NP）被公开。 只要不到一半的用户通过DSLAM主动移动数据，但只能使用一半的数字信号处理硬件和一半的功耗来提供支持所有连接用户的全部G.dmt速率的方法 线路驱动程序。 本发明允许将常规方案的ADSL端口数量增加一倍，因为大约20％的功率在50％以下，而仅有一半的相应连接，所有这些G.dmt速率可能超过50％，逐渐活跃的G.lite 价格基于分层关税结构，直到最终使用率达到100％时，所有用户将被迫恢复到由G.lite提供的最高价格。 只有在利用率下降的情况下，活跃用户才能恢复到G.dmt的最大传输速率。 一旦使用率再次下降到50％以下，那么所有活跃用户将能够利用G.dmt的最大传输速率。 预算。 当用户在其用户上活跃时，体验到最大的线路。 然而，当利用者开始体验固定的政策或基于分级关税结构的政策时，直到最终使用率达到100％时，所有用户将被迫恢复到由G.lite提供的最高利率。 只有在利用率下降的情况下，活跃用户才能恢复到G.dmt的最大传输速率。 一旦使用率再次下降到50％以下，那么所有活跃用户将能够利用G.dmt的最大传输速率。
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3.发明专利
公开(公告)号：JP2002344658A
公开(公告)日：2002-11-29
申请号：JP2002078556
申请日：2002-03-20
Applicant: IBM
Inventor： DAVIS GORDON TAYLOR , DERBY JEFFREY HASKELL , ELEFTHERIOU EVANGELOS STAVROS , OELCER SEDAT , WARE MALCOLM SCOTT
Abstract: PROBLEM TO BE SOLVED: To substantially reduce the overall power requirement of a line driver connected to a digital subscriber line DSL by limiting a bandwidth of a signal transmitted to all subscriber lines other than those connected to an intended recipient of a physical data frame. SOLUTION: A shared digital subscriber line modem achieves reduced total power consumption and aquires data security by generating and transmitting a physical data frame which includes a control channel and a data field to only the connected client modem associated with the intended recipient. A second physical frame which does not include the data field is generated and transmitted to all of the other connected client modems.
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公开(公告)号：JP2001350638A
公开(公告)日：2001-12-21
申请号：JP2001104520
申请日：2001-04-03
Applicant: IBM
Inventor： DAVIS GORDON TAYLOR , HEDDES MARCO C , LEAVENS ROSS BOYD , VERPLANKEN FABRICE JEAN
Abstract: PROBLEM TO BE SOLVED: To attain the more efficient use of a processor resource. SOLUTION: When an execution is permitted in a thread that is stopping the acting, a prefetch buffer 118 is used in relation to a plurality of independent thread processings in a method as avoids an instantaneous stop. In order to realize the more efficient use of the processor resource, a mechanism 30 for controlling the switching from the thread within a processor to another thread is established. This mechanism imparts a temporary control to the alternative execution thread when a short waiting time event is generated, and imparts a perfect control to the alternative execution thread when a long waiting time even is generated. This thread control mechanism comprises a priority FIFO constituted so that the execution priorities of at least two execution threads within the processor are controlled according to their outputs on the basis of the length of the time when each execution thread is stayed within an FIFO 52.
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公开(公告)号：JP2002344420A
公开(公告)日：2002-11-29
申请号：JP2002078654
申请日：2002-03-20
Applicant: IBM
Inventor： DAVIS GORDON TAYLOR , DERBY JEFFREY HASKELL , ELEFTHERIOU EVANGELOS STAVROS , OELCER SEDAT , WARE MALCOLM SCOTT
Abstract: PROBLEM TO BE SOLVED: To reduce electric power demand of the line driver of a DSL server modem, by limiting the bandwidth of signals to be transmitted to a related client modem (namely, limiting power in signals), excluding the case where a client is intending data reception in a current physical frame (not in idle state). SOLUTION: A low-power DSL modem transmitter suited for incorporation into an integral DSLAM server line card transmits all the power physical frame, including a control channel and a data field when there are data to be transmitted, and transmits a physical frame having only the control channel or the control channel and a low-power synchronous field, when there are no data to be transmitted. By regulating the flow of data packets to the DSL selectively, a method for controlling total power consumed in the integral DSLAM is provided.
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Patent Agency Ranking
公开(公告)号：JP2002149424A
公开(公告)日：2002-05-24
申请号：JP2001265792
申请日：2001-09-03
Applicant: IBM
Inventor： DAVIS GORDON TAYLOR , MARKO C HEADS , RIWENS ROSE BOYED , RINALDI MARK ANTHONY
IPC: G06F9/38 , G06F9/46 , G06F13/10 , G06F13/14 , G06F15/00 , G06F15/16 , G06F15/163 , G06F15/76 , G06F15/78 , G06F15/80 , H04L29/06
Abstract: PROBLEM TO BE SOLVED: To increase the communicating efficiency of a protocol processor unit(PPU) and a coprocessor in a network processor. SOLUTION: An integrated processor composite body is provided with a plurality of protocol processor units(PPU). The respective units are provided with at least one or preferentially two individually functioning core language processors(CLP). The respective CLP are allowed to support dual threads through a logical coprocessor execution/data interface with a plurality of exclusive coprocessors to be used for the respective PPU. In response to an operation instruction, the PPU identifies an events whose waiting time is long and an event whose waiting time is short, and controls and switches the priority order of the execution of threads based on the identification. Also, in response to the operation instruction, the conditional execution of the specific coprocessor operation is made available when the designated specific event is generated or not generated.
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公开(公告)号：AT453974T
公开(公告)日：2010-01-15
申请号：AT02732096
申请日：2002-01-17
Applicant: IBM
Inventor： BARKER KENNETH JAMES , DAVIS GORDON TAYLOR , JEFFRIES CLARK DEBS , RINALDI MARK ANTHONY , SUDEEP KARTIK
Abstract: The decision to discard or forward a packet is made by a flow control mechanism, upstream from the forwarding engine in the node of a communication network. The forwarding engine includes a switch with mechanism to detect congestion in the switch and return a binary signal B indicating congestion or no congestion. The flow control mechanism uses B and other network related information to generate a probability transmission table against which received packets are tested to determine proactively whether a packet is to be discarded or forwarded.
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公开(公告)号：GB2366426B
公开(公告)日：2004-11-17
申请号：GB0108828
申请日：2001-04-09
Applicant: IBM
Inventor： DAVIS GORDON TAYLOR , HEDDES MARCO C , LEAVENS ROSS BOYD , RINALDI MARK A
Abstract: A network processor utilizes protocol processor units (PPUs) to provide instruction communication for the network. Each PPU includes a core language processor (CLP). Each CLP contains general purpose registers and includes a coprocessor that contains scalar registers and array registers. The CLP controls and instructs a plurality of coprocessors that run in parallel with the CLP. Each coprocessor is a specialized hardware assist engine having direct access to the CLP registers and arrays through two sets of interface signals, a coprocessor execution interface and a coprocessor data interface.
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公开(公告)号：HK1054098A1
公开(公告)日：2003-11-14
申请号：HK03106314
申请日：2003-09-05
Applicant: IBM
Inventor： BASS BRIAN MITCHELL , CALVIGNAC JEAN LOUIS , DAVIS GORDON TAYLOR , GALLO ANTHONY MATTEO , MARCO HEDDES , KENNETH JENKINS STEVEN , BOYD LEAVENS ROSS , STEVEN SIEGEL MICHAEL , JEAN VERPLANKEN FABRICE
Abstract: A system and method of frame protocol classification and processing in a system for data processing (e.g., switching or routing data packets or frames). The present invention includes analyzing a portion of the frame according to predetermined tests, then storing key characteristics of the packet for use in subsequent processing of the frame. The key characteristics for the frame (or input information unit) include the type of layer 3 protocol used in the frame, the layer 2 encapsulation technique, the starting instruction address, flags indicating whether the frame uses a virtual local area network, and the identity of the data flow to which the frame belongs. Much of the analysis is preferably done using hardware so that it can be completed quickly and in a uniform time period. The stored characteristics of the frame are then used by the network processing complex in its processing of the frame. The processor is preconditioned with a starting instruction address and the location of the beginning of the layer 3 header as well as flags for the type of frame. That is, the instruction address or code entry point is used by the processor to start processing for a frame at the right place, based on the type of frame. Additional instruction addresses can be stacked and used sequentially at branches to avoid additional tests and branching instructions. Additionally, frames comprising a data flow can be processed and forwarded in the same order in which they are received.
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公开(公告)号：CZ20021442A3
公开(公告)日：2002-07-17
申请号：CZ20021442
申请日：2000-12-21
Applicant: IBM
Inventor： BASS BRIAN MITCHELL , CALVIGNAC JEAN LOUIS , DAVIS GORDON TAYLOR , GALLO ANTHONY MATTEO , HEDDES MARCO , JENKINS STEVEN KENNETH , LEAVENS ROSS BOYD , SIEGEL MICHAEL STEVEN , VERPLANKEN FABRICE JEAN
Abstract: A system and method of frame protocol classification and processing in a system for data processing (e.g., switching or routing data packets or frames). The present invention includes analyzing a portion of the frame according to predetermined tests, then storing key characteristics of the packet for use in subsequent processing of the frame. The key characteristics for the frame (or input information unit) include the type of layer 3 protocol used in the frame, the layer 2 encapsulation technique, the starting instruction address, flags indicating whether the frame uses a virtual local area network, and the identity of the data flow to which the frame belongs. Much of the analysis is preferably done using hardware so that it can be completed quickly and in a uniform time period. The stored characteristics of the frame are then used by the network processing complex in its processing of the frame. The processor is preconditioned with a starting instruction address and the location of the beginning of the layer 3 header as well as flags for the type of frame. That is, the instruction address or code entry point is used by the processor to start processing for a frame at the right place, based on the type of frame. Additional instruction addresses can be stacked and used sequentially at branches to avoid additional tests and branching instructions. Additionally, frames comprising a data flow can be processed and forwarded in the same order in which they are received.
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