Abstract:
PROBLEM TO BE SOLVED: To provide a pixel sensor cell enhanced in dynamic range ability. SOLUTION: The pixel sensor cell including a column circuit, a design structure for fabricating the pixel sensor cell including the column circuit and a method for operating the pixel sensor cell including the column circuit are predicated upon the measurement of multiple reference data point and signal data point pairs from a floating diffusion at a variable capacitance. The variable capacitance is provided by excluding or including a transfer gate transistor capacitance in addition to a floating diffusion capacitance. Such a variable capacitance provides variable dynamic ranges for the pixel sensor cell including the column circuit. COPYRIGHT: (C)2011,JPO&INPIT
Abstract:
PROBLEM TO BE SOLVED: To provide CMOS image sensor pixel sensor cells, methods for fabricating the pixel sensor cells, and design structures for fabricating the pixel sensor cells. SOLUTION: The CMOS image sensor cells are designed to allow for back side illumination in global shutter mode by providing light shielding from back side illumination of at least one transistor within each pixel sensor cell. In a first particular generalized embodiment, a light blocking layer is located and formed interposed between a first semiconductor layer including a photoactive region and a second semiconductor layer including at least a second transistor or a floating diffusion region shielded by the light blocking layer. In a second generalized embodiment, a thin film transistor and a metal-insulator-metal capacitor are used in place of the floating diffusion region, and are arranged, shielded in a dielectric-isolated metallization stack over a carrier substrate. COPYRIGHT: (C)2010,JPO&INPIT
Abstract:
PROBLEM TO BE SOLVED: To provide a solid-state image sensor and a method of manufacturing the same. SOLUTION: A solid-state image sensor has a substrate on which a photosensitive region is provided. In the solid-state image sensor, an nonuniform reflection layer is arranged, on a side opposite to the incidence side of the emitted light of the photosensitive region. The nonuniform reflecting layer has a shape for reflecting an incident emitted light that is not captured by one photosensitive region at first to return it to the photosensitive area, whereas which does not reflect the incident emitted light that is not captured by the one photosensitive region, at first, to other photosensitive region provided adjacent to the one photosensitive region on the substrate. COPYRIGHT: (C)2011,JPO&INPIT
Abstract:
PROBLEM TO BE SOLVED: To provide a method for normalizing strain in a semiconductor device, and a strain-normalized semiconductor device. SOLUTION: This method includes steps of: forming first and second field-effect transistors of an integrated circuit; forming a stress layer over the first and second field-effect transistors, the stress layer inducing strain in channel regions of the first and second field-effect transistors; and selectively thinning the stress layer over at least a portion of the second field-effect transistor. COPYRIGHT: (C)2011,JPO&INPIT
Abstract:
PROBLEM TO BE SOLVED: To provide a CMOS image sensor having a photodetector diode formed on the side wall of a deep trench, achieving separation of a collector, and thus simplifying a process. SOLUTION: A pixel sensor cell includes a semiconductor substrate having a surface, and a photoelectric element having a non-transversely oriented charge collection area which is formed on the substrate and is completely separated from a physical boundary including the substrate surface. The photoelectric element includes a trench which is formed on the substrate made of a first conductive material and has side walls, a first doped layer which is formed beside at least one of the side walls and is made of a second conductive material, and a second doped layer which is formed between the first doped layer and at least one of the trench side walls and is further formed on the substrate surface. The second doped layer separates the first doped layer from at least one of the trench side walls and the substrate surface. COPYRIGHT: (C)2007,JPO&INPIT
Abstract:
PROBLEM TO BE SOLVED: To provide an apparatus for biasing ultra-low voltage logic circuits. SOLUTION: An integrated circuit device includes multiple transistors and a global body bias circuit. The global body bias circuit includes a first transistor and second transistors connected in series between a power supply and second power supply or ground. The gate and source of the first transistor are connected to the second power supply. The drains and bodies of the first and second transistors are connected to form an output connected to the bodies of the other transistors within the integrated circuit device. COPYRIGHT: (C)2003,JPO
Abstract:
A heterojunction bipolar transistor 100 and a method of forming the heterojunction bipolar transistor with a raised collector pedestal 125 in reduced dimension for reduced base-collector junction capacitance. The raised collector pedestal 125 is on the top surface of a substrate 121, 120, 101 and extends vertically through dielectric layer(s) 103, 104. The raised collector pedestal is un-doped or low-doped and is aligned above a sub-collector region 120, 121 contained within the substrate 101 and is narrower than that sub-collector region 120. An intrinsic base layer 105,132/131 is above the raised collector pedestal and the dielectric layer(s) 103, 104. An extrinsic base layer 141 is above the intrinsic base layer 132, 131. Thus, the space between the extrinsic base layer and the sub-collector region is increased. This increased space is filled by dielectric material and the electrical connection between the intrinsic base layer and the sub-collector region is provided by the relatively narrow, un-doped or low-doped, raised collector pedestal. Consequently the base-collector junction capacitance is reduced and the maximum oscillation frequency (fmax) is increased.
Abstract:
Ein Fotodetektor enthält: einen sich über ein Substrat hinweg erstreckenden Lichtwellenleiter aus einem Lichtwellenleitermaterial: eine auf dem Lichtwellenleiter gebildete Isolierschicht mit einer Öffnung, die den Lichtwellenleiter freilegt; eine auf der Isolierschicht und in die Öffnung hinein gebildete Fotodetektorschicht, um einen Kontakt mit dem Lichtwellenleiter herzustellen, wobei die Fotodetektorschicht ein erstes Ende an der Öffnung und ein der Öffnung abgewandtes zweites Ende hat, wobei es sich bei der Fotodetektorschicht um ein Gradientenmaterial des Lichtwellenleitermaterials und des Germaniums handelt, wobei ein Anteil des Lichtwellenleitermaterials im Gradientenmaterial von einem Höchstwert am ersten Ende bis zu einem Mindestwert am zweiten Ende variiert und wobei ein Anteil des Germaniums im Gradientenmaterial von einem Minimalwert am ersten Ende bis zu einem Höchstwert am zweiten Ende variiert; einen Fotodetektorbereich am zweiten Ende; und eine Erweiterung der Fotodetektorschicht, die sich unter einem Winkel von der Fotodetektorschicht am zweiten Ende aus erstreckt.
Abstract:
A method of checking layout integrity comprises the steps of receiving inputs defining a plurality of devices for a layout, generating a signature for each device in the layout, when created, from one or more parameters of the device, storing the generated signatures with the layout, receiving the stored layout and signatures, regenerating each signature for each device in the stored layout, and comparing each regenerated signature with the corresponding stored signature. The signature comprises the sum of coordinates, perimeter and area of the devices.