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公开(公告)号:WO02057179A2
公开(公告)日:2002-07-25
申请号:PCT/IB0200154
申请日:2002-01-11
Applicant: IBM , DESPONT MICHEL , DRECHSLER UTE , MAGNUSON ROY H
Inventor: DESPONT MICHEL , DRECHSLER UTE , MAGNUSON ROY H
IPC: B81B3/00 , B81C1/00 , C23F13/14 , H01L21/306
CPC classification number: H01L21/30604 , B81B2201/12 , B81B2203/0118 , B81C1/00801 , B81C2201/0107 , B81C2201/0114 , B81C2201/0133 , C23F13/14
Abstract: A method for protecting a material of a microstructure comprising said material and a noble metal layer (8) against undesired galvanic etching during manufacture comprises forming on the structure a sacrificial metal layer (12) having a lower redox potential than said material, the sacrificial metal layer (12) being electrically connected to said noble metal layer (8).
Abstract translation: 一种用于在制造过程中保护包含所述材料的微结构材料和贵金属层(8)的方法,用于防止不期望的电化学蚀刻,包括在所述结构上形成具有比所述材料更低氧化还原电位的牺牲金属层(12),所述牺牲金属 层(12)电连接到所述贵金属层(8)。
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公开(公告)号:DE60239734D1
公开(公告)日:2011-05-26
申请号:DE60239734
申请日:2002-01-11
Applicant: IBM
Inventor: DESPONT MICHEL , DRECHSLER UTE , MAGNUSON ROY H
IPC: B81B3/00 , B81C1/00 , C23F13/14 , H01L21/306
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公开(公告)号:CA1332885C
公开(公告)日:1994-11-08
申请号:CA581531
申请日:1988-10-27
Applicant: IBM
Inventor: JOHNSON ROBERT W , LAWRENCE WILLIAM H , LEMON GARY K , MAGNUSON ROY H , MARKOVICH VOYA R , PARSONS RALPH E , SAMBUCETTI CARLOS J
Abstract: A non-conductive substrate is conditioned for subsequent selective deposition of a metal thereon by providing at least one of the major surfaces of the substrate in roughened form, contacting that surface(s) with a palladium/tin catalyst, activating the catalyst by employing an alkali hydroxide solution, laminating a photosensitive composition to the major surface(s), and exposing the photosensitive composition to actinic light in a predetermined pattern and then developing to provide the predetermined pattern.
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公开(公告)号:CA1223157A
公开(公告)日:1987-06-23
申请号:CA499458
申请日:1986-01-13
Applicant: IBM
Inventor: KASCHAK RONALD A , MAGNUSON ROY H , YARMCHUK EDWARD J
Abstract: Method for controlling plating in an electroless plating process. The plating rate is continuously monitored. The plating rate is compared with a set point plating rate. A control voltage is derived proportional to the difference in plating rate and the desired plating rate, the integral of the difference, and the derivative of the difference. The control voltage is applied to a replenishment control for controlling the replenishment rate of a constituent chemical of the plating process.
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公开(公告)号:AU2002225276A1
公开(公告)日:2002-07-30
申请号:AU2002225276
申请日:2002-01-11
Applicant: IBM
Inventor: DRECHSLER UTE , DESPONT MICHEL , MAGNUSON ROY H
IPC: B81B3/00 , B81C1/00 , C23F13/14 , H01L21/306 , H01L21/308
Abstract: A method for protecting a material of a microstructure comprising the material and a noble metal layer against undesired galvanic etching during manufacture, the method comprises forming on the structure a sacrificial metal layer having a lower redox potential than the material, the sacrificial metal layer being electrically connected to the noble metal layer.
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公开(公告)号:DE68917748T2
公开(公告)日:1995-03-30
申请号:DE68917748
申请日:1989-02-02
Applicant: IBM
Inventor: JOHNSON ROBERT W , LAWRENCE WILLIAM H , LEMON GARY K , MAGNUSON ROY H , MARKOVICH VOYA R , PARSONS RALPH E , SAMBUCETTI CARLOS J
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公开(公告)号:ES2059578T3
公开(公告)日:1994-11-16
申请号:ES89101763
申请日:1989-02-02
Applicant: IBM
Inventor: JOHNSON ROBERT W , LAWRENCE WILLIAM H , LEMON GARY K , MAGNUSON ROY H , MARKOVICH VOYA R , PARSONS RALPH E , SAMBUCETTI CARLOS J
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公开(公告)号:HK1028866A1
公开(公告)日:2001-03-02
申请号:HK00106779
申请日:2000-10-25
Applicant: IBM
Inventor: LAUFFER JOHN M , MAGNUSON ROY H , MARKOVICH VOYA R , WELSH JOHN A
Abstract: A technique for forming an organic chip carrier or circuit board, having two voltage planes and at least two signal planes is provided which includes bonding a first layer of photolithographic dielectric material to a first metal layer and exposing the first layer of dielectric material to a pattern of radiation to provide at least one opening through the first layer of the dielectric material. A second metal layer is bonded to the first layer of photoimageable material on the opposite side from the first metal layer. Holes are etched in the first and second metal layers which correspond to and are larger than each of the patterns on said openings in the first layer of dielectric material. The exposed pattern on the first layer of dielectric material is then developed, with the openings in the first and second metal layers being larger than the corresponding developed opening in the first dielectric material. Second and third layers of photoimageable dielectric material are applied on the first and second metal layers, respectively and are photopatterned and developed to provide openings in each of the second and third layers of dielectric material some of which correspond to each of the holes in the first layer of dielectric material and the holes in the first and second metal layers, some of which terminate at the underlying metal layer. The exposed surfaces of both the second and third dielectric material, are circuitized and the holes plated or filled with metal.
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公开(公告)号:DE68917748D1
公开(公告)日:1994-10-06
申请号:DE68917748
申请日:1989-02-02
Applicant: IBM
Inventor: JOHNSON ROBERT W , LAWRENCE WILLIAM H , LEMON GARY K , MAGNUSON ROY H , MARKOVICH VOYA R , PARSONS RALPH E , SAMBUCETTI CARLOS J
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