公开(公告)号：JP2001077053A

公开(公告)日：2001-03-23

申请号：JP2000227035

申请日：2000-07-27

Applicant: IBM

Inventor： UZOH CYPRIAN E ,  PETER S LOCKE

IPC: C25D7/12 ,  H01L21/288 ,  H01L21/768

Abstract: PROBLEM TO BE SOLVED: To plate a metal in a submicron structure by sticking a seed layer on the surface of a submicron structure, and annealing the seed layer at a specified temperature before a metal is plated on the seed layer. SOLUTION: A seed layer 1 is allowed to stick to the surface of submicron structure, and the seed layer 1 is annealed at about 80-130 deg.C. Then a metal is plated on the seed layer 1. The annealing is performed during sticking to the seed layer 1 or after completion of it. The seed layer 1 is allowed to stick by sputtering regardless of whether annealing is performed during sticking of the seed layer 1 or after completion. Annealing is typically performed at about 80-130 deg.C, however, it is performed below 120 deg.C. Any annealing temperature can be controlled to control the resistivity of the formed seed layer 1.

公开(公告)号：JP2002020891A

公开(公告)日：2002-01-23

申请号：JP2001127259

申请日：2001-04-25

Applicant: IBM

Inventor： VOLANT RICHARD P ,  PETER S LOCKE ,  PETRARCA KEVIN S ,  DAVID M ROCKWELL ,  SESHADORI SUBANA

IPC: C25D7/12 ,  C25D5/02 ,  C25D5/48 ,  H01L21/28 ,  H01L21/288 ,  H01L21/304 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/52

Abstract: PROBLEM TO BE SOLVED: To provide an electric plating method of a metal structure in a feature formed in a substrate. SOLUTION: A liner material 22 is adhered to an upper surface of the substrate and a bottom surface and a side wall of the feature 21. Next, a seed layer 23 is adhered onto the liner by the CVD. The seed layer is selectively removed from the upper surface of the substrate so that the seed layer is left behind only on the bottom surface of the feature. The metal is electrically plated by using this part of the seed layer so that the metal fills the feature. The upper surface is not electrically plated because the seed layer is removed from the upper surface of the substrate.

公开(公告)号：JP2001332558A

公开(公告)日：2001-11-30

申请号：JP2001098341

申请日：2001-03-30

Applicant: IBM

Inventor： CARLOS J SANBASETSUTEI ,  STEVEN H BOECHER ,  PETER S LOCKE ,  JUDITH M RABINO ,  SUUN-CHEON SEO

IPC: H01L21/288 ,  H01L21/28 ,  H01L21/3205 ,  H01L23/52 ,  H01L23/522

Abstract: PROBLEM TO BE SOLVED: To provide improved structure where a single layer having the integrity of a liner, and the electrical continuity between a related level and another metal one is given. SOLUTION: The structure of a semiconductor has a semiconductor dielectric material 1 having an opening. A first material 15 for backing the opening is composed of M, X, and Y. In this case, the M is selected from a group consisting of cobalt and nickel, the X is selected from a group consisting of tungsten and silicon, and the Y is selected from a group consisting of phosphor and boron. A second material 20 fills a backed dielectric material.

公开(公告)号：SG91313A1

公开(公告)日：2002-09-17

申请号：SG200007014

申请日：2000-11-30

Applicant: IBM

Inventor： ERICK GREGORY WALTON ,  DEAN S CHUNG ,  LARA SANDRA COLLINS ,  WILLIAM E CORBIN ,  HARIKLIA DELIGIANNI ,  DANIEL CHARLES EDELSTEIN ,  JAMES E FLUEGEL ,  JOSEF WARREN KOREJWA ,  PETER S LOCKE ,  CYPRIAN EMEKA UZOH

IPC: C25D5/06 ,  C25D17/14 ,  C25D5/22 ,  C05D5/22 ,  C25D17/00 ,  H05K3/00

Abstract: A metal plating apparatus is described which includes a compressible member having a conductive surface covering substantially all of the surface of the substrate to be plated. The plating current is thereby transmitted over a wide area of the substrate, rather than a few localized contact points. The compressible member is porous so as to absorb the plating solution and transmit the plating solution to the substrate. The wafer and compressible member may rotate with respect to each other. The compressible member may be at cathode potential or may be a passive circuit element.