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    Improved fuse link structures through the addition of dummy structures
    2.
    发明公开
    Improved fuse link structures through the addition of dummy structures 失效
    改进的结构，用于通过加入虚设结构来连接熔丝

    公开(公告)号：EP0746025A3

    公开(公告)日：1998-06-03

    申请号：EP96108177

    申请日：1996-05-22

    Applicant: SIEMENS AG ,  IBM

    Inventor： MITWALSKY ALEXANDER ,  RYAN JAMES GARDNER

    IPC: B23K26/00 ,  B23K26/38 ,  H01L21/304 ,  H01L21/82 ,  H01L21/822 ,  H01L23/525 ,  H01L27/04

    CPC classification number: H01L23/5258 ,  H01L2924/0002 ,  Y10S438/926 ,  Y10S438/952 ,  H01L2924/00

    Abstract: An improved etch behavior is promoted to generate vertical sidewalls for fuse links that will promote reliable and repeatable laser cutting of the fuse links. In one embodiment, dummy structures are added adjacent to fuse links in order to obtain the vertical sidewalls for reliable fuse deletion. The dummy structures form no part of the fuse or circuit structure but, because of the proximity of the dummy structures to the fuse links, vertical sidewalls are promoted in a reactive ion etch which is used to form the fuse array. In another embodiment, the vertical sidewalls of the fuse links are achieved in a damascene process in which grooves are formed in an oxide layer and filled with a metal. These grooves correspond to the fuse links and alternating dummy structures. Once filled, the surface is planarized using a chemical-mechanical process. The dummy structures provide reinforcement for the metallization (metal and dielectric film), maintaining the integrity of the metallization. In both embodiments, the vertical sidewalls and constant height of the resulting fuse links promote reliable laser cutting.

    ELECTROSTATIC DISCHARGE PROTECTION APPARATUS
    3.
    发明专利
    ELECTROSTATIC DISCHARGE PROTECTION APPARATUS 失效

    公开(公告)号：JPH10125858A

    公开(公告)日：1998-05-15

    申请号：JP27582697

    申请日：1997-10-08

    Applicant: IBM ,  TOSHIBA CORP

    Inventor： EL-KAREH BADIH ,  RYAN JAMES GARDNER ,  TANIMOTO KOKICHI

    IPC: H01L27/04 ,  H01L21/822 ,  H01L27/02 ,  H01L27/092 ,  H01L29/47 ,  H01L29/872

    Abstract: PROBLEM TO BE SOLVED: To reduce the latch up incidence of an ESD structure by suppressing the injection of minority carriers in one or both parasitic bipolar transistors, components unique to the ESD structure. SOLUTION: An ESD structure 300 has some semiconductor diffused regions substituted by contacts 316, 320, 328 which form Schottky barrier diodes with underlying semiconductor diffused regions. The Schottky barrier diode is a majority carrier device with a few of minority carriers when being forward biased. This suppresses the possible bipolar operation from bringing up the latch up in the ESD structure. Since the SDB is a majority carrier device, a very few of minority carrier will be injected when the SBD is forward biased, thus preventing the latch up.

    Instrument for measuring in-situ temperature using x-ray diffusion
    4.
    发明专利
    Instrument for measuring in-situ temperature using x-ray diffusion 审中-公开
    使用X射线扩散测量现场温度的仪器

    公开(公告)号：JP2006194888A

    公开(公告)日：2006-07-27

    申请号：JP2006007665

    申请日：2006-01-16

    Applicant: Internatl Business Mach Corp ,  Siemens Ag ,  Toshiba Corp ,  インターナショナル ビジネス マシーンズ コーポレーション ,  シーメンス アクチエンゲゼルシヤフトSiemens Aktiengesellschaft ,  株式会社東芝

    Inventor： OKUMURA KATSUYA ,  RYAN JAMES GARDNER ,  STEPHENSON GREGORY B ,  TIMME HANS-JOERG

    IPC: G01K11/30 ,  G01N23/207 ,  G21K5/02 ,  H01L21/66

    CPC classification number: G01K11/30 ,  G01N23/207

    Abstract: PROBLEM TO BE SOLVED: To provide an improved method and instrument for in-situ/noncontact temperature measurement in a semiconductor process.
    SOLUTION: A single crystal silicon wafer is arranged in a process chamber, the first and second incident X-ray sources are communicated respectively with the wafer in the process chamber, an X-ray having the first prescribed wave length is selected from the first X-ray source, an X-ray having the second prescribed wave length is selected from the second X-ray source, wherein the first prescribed wave length is different mutually from the second prescribed wave length, the selected X-ray is focused in a measuring spot on the wafer, the first and second X-rays reflected from the wafer are received, and a lattice constant of the wafer is detected taking shift motion or deflection of the wafer under measurement of a temperature into consideration, based on the received reflected X-ray of the first prescribed wave length and the received reflected X-ray of the second prescribed wave length, so as to find the temperature of the wafer determined by the lattice constant.
    COPYRIGHT: (C)2006,JPO&NCIPI

    Abstract translation: 要解决的问题：提供一种用于半导体工艺中原位/非接触温度测量的改进方法和仪器。 解决方案：单晶硅晶片布置在处理室中，第一和第二入射X射线源分别与处理室中的晶片连通，具有第一规定波长的X射线选自 从第二X射线源选择第一X射线源，具有第二规定波长的X射线，其中第一规定波长与第二规定波长相互不同，所选择的X射线被聚焦 在晶片上的测量点中，接收从晶片反射的第一和第二X射线，并且考虑到在考虑温度的测量下晶片的移动运动或偏转来检测晶片的晶格常数，基于 接收第一规定波长的反射X射线和第二规定波长的接收反射X射线，以找到由晶格常数确定的晶片的温度。 版权所有（C）2006，JPO＆NCIPI

    FORMING METHOD FOR CRACK STOP AND SEMICONDUCTOR WAFER STRUCTURE
    5.
    发明专利
    FORMING METHOD FOR CRACK STOP AND SEMICONDUCTOR WAFER STRUCTURE 失效

    公开(公告)号：JPH1041255A

    公开(公告)日：1998-02-13

    申请号：JP10701497

    申请日：1997-04-24

    Applicant: IBM ,  SIEMENS AG

    Inventor： MITWALSKY ALEXANDER ,  RYAN JAMES GARDNER

    IPC: H01L21/301 ,  H01L23/485 ,  H01L23/525

    Abstract: PROBLEM TO BE SOLVED: To form a simplified crack stop compatible with a shallow fuse etching treatment usable for the present low-cost redundant structure using a high level metal fuse. SOLUTION: A final level metallization(LLM) etching is modified to enable a bond pad/fuse/crack-stop etching in a high productivity single step. A stack formed on the edge of a dicing channel at metallization levels M0, M1, M2 easily removed after the modified LLM etching before dicing to physically separate an insulation film covering dicing channels from an insulator covering electrically active chip regions. The separation prevents the crack from expanding to the active chip region via the insulator in the dicing channel.

    6.
    发明专利
    未知

    公开(公告)号：DE69217702D1

    公开(公告)日：1997-04-10

    申请号：DE69217702

    申请日：1992-04-16

    Applicant: SIEMENS AG ,  IBM

    Inventor： RYAN JAMES GARDNER ,  STRIPPE DAVID CRAIG ,  VOLLMER BERND MICHAEL

    IPC: H01L21/285 ,  C23C14/04 ,  H01J37/32 ,  H01J37/34 ,  H01L21/768 ,  H05K3/40

    Abstract: A sputtering deposition wherein high aspect ratio apertures are coated with conductive films exhibiting low bulk resistivity, low impurity concentrations, and regular morphologies. A collimator is used having an aspect ratio that approximates the aspect ratio of the apertures. The resulting film thickness at the bottom of the aperture is at least 2X what can be achieved using conventional sputtering methods. The amount of material deposited at the bottom of the apertures can be further enhanced by elevating the temperature of the substrate (e.g. 450 C) during the deposition process.

    8.
    发明专利
    未知

    公开(公告)号：DE69534699T2

    公开(公告)日：2006-07-20

    申请号：DE69534699

    申请日：1995-09-22

    Applicant: IBM

    Inventor： DOBUZINSKY DAVID MARK ,  MATSUDA TETSUO ,  VAN NGUYEN SON ,  RYAN JAMES GARDNER

    IPC: C23C16/30 ,  H01L21/316 ,  C23C16/40 ,  C23C16/505 ,  H01L21/31

    Abstract: Fluorine-doped oxide is formed that is resistant to water absorption by the use of two sources of silicon, one being the fluorine precursor and the other being available to react with excess fluorine from the fluorine precursor, thereby reducing the number of fluorine radicals in the layer; the fluorine precursor containing a glass-forming element that combines with the other glass constituents to carry into the gas a diatomic radical containing one atom of fluorine and one atom of the glass-forming element. In particular, comparison between traces of undoped oxide and fluorosilicate glass clearly shows that the former has a greater SIOH concentration which is a manufacturing yield detractor.

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