Abstract:
An integrated circuit for an imaging system has an array of optical sensors (40), and an array of optical filters (10) each configured to pass a band of wavelengths onto one or more of the sensors, the array of optical filters being integrated with the array of sensors, and the integrated circuit also having read out circuitry (30) to read out pixel values from the array of sensors to represent an image, different ones of the optical filters being configured to have a different thickness, to pass different bands of wavelengths by means of interference, to allow detection of a spectrum of wavelengths. The read out circuitry can enable multiple pixels under one optical filter to be read out in parallel. The thicknesses may vary non monotonically across the array. The read out, or later image processing, may involve selection or interpolation between wavelengths, to carry out spectral sampling or shifting, to compensate for thickness errors.
Abstract:
According to a preferred embodiment of the method of the invention, an assembly is produced comprising a temporary wafer (4) and one or more tiles (6) that are removably attached to said temporary wafer, preferably through a temporary adhesive layer (5). The tiles comprise a carrier portion (6a) and an active material portion (6b). The active material portion (6b) is attached to the temporary carrier (4). The assembly further comprises a single continuous layer of the first material surrounding each of the one or more tiles (6). Then the back side of the carrier portions (6a) of the tiles and of the continuous layer of the first material are simultaneously planarized, and the planarized back sides of the tiles and of the continuous layer of the first material are bonded to a permanent carrier wafer (17), after which the temporary carrier wafer (4) is removed. The method results in a hybrid wafer comprising a planar top layer formed of the material of the continuous layer (1,22) with one or more islands embedded therein, the top layer of said islands being formed by the top layer of the active material portion (6b) of the one or more tiles (6).
Abstract:
A method is disclosed for manufacturing a sealed cavity comprised in a microelectronic device, comprising forming a sacrificial layer at least at locations where the cavity is to be provided, depositing a membrane layer on top of the sacrificial layer, patterning the membrane layer in at least two separate membrane layer blocks, removing the sacrificial laye through the membrane layer, and sealing the cavity by sealing the membrane layer, wherein patterning the membrane layer is performed after removal of the sacrificial layer; and associated microelectronic devices.
Abstract:
A method is disclosed for manufacturing a semiconductor device, the method comprising - providing a substrate comprising a main surface with a non flat topography, the surface comprising substantial topography variations; - forming a first capping layer over the main surface; wherein, during formation of the first capping layer, local defects in the first capping layer are introduced, the local defects being positioned at locations corresponding to the substantial topography variations and the local defects being suitable for allowing a predetermined fluida to pass through. Associated membrane layers, capping layers and microelectronic devices have also been disclosed.
Abstract:
A MEMS device 1 is disclosed comprising a cavity 5 containing a MEMS component 6, the cavity 5 being formed in a dielectric layer stack 3 having a thickness t d , whereby the cavity 5 and the dielectric layer stack 3 are sandwiched between a substrate 2 and a sealing dielectric layer 4 having a thickness t s , and whereby the MEMS component 6 is enclosed by at least one trench 8 extending over the thickness t d of the dielectric layer stack 3 and of the sealing dielectric t s .
Abstract:
An integrated circuit for an imaging system has an array of optical sensors (40), and an array of optical filters (10) each configured to pass a band of wavelengths onto one or more of the sensors, the array of optical filters being integrated with the array of sensors, and the integrated circuit also having read out circuitry (30) to read out pixel values from the array of sensors to represent an image, different ones of the optical filters being configured to have a different thickness, to pass different bands of wavelengths by means of interference, to allow detection of a spectrum of wavelengths. The read out circuitry can enable multiple pixels under one optical filter to be read out in parallel. The thicknesses may vary non monotonically across the array. The read out, or later image processing, may involve selection or interpolation between wavelengths, to carry out spectral sampling or shifting, to compensate for thickness errors.
Abstract:
A method is disclosed for manufacturing a semiconductor device, the method comprising - providing a substrate comprising a main surface with a non flat topography, the surface comprising substantial topography variations; - forming a first capping layer over the main surface; wherein, during formation of the first capping layer, local defects in the first capping layer are introduced, the local defects being positioned at locations corresponding to the substantial topography variations and the local defects being suitable for allowing a predetermined fluida to pass through. Associated membrane layers, capping layers and microelectronic devices have also been disclosed.
Abstract:
A method is disclosed for manufacturing a sealed cavity comprised in a microelectronic device, comprising forming a sacrificial layer at least at locations where the cavity is to be provided, depositing a membrane layer on top of the sacrificial layer, patterning the membrane layer in at least two separate membrane layer blocks, removing the sacrificial laye through the membrane layer, and sealing the cavity by sealing the membrane layer, wherein patterning the membrane layer is performed after removal of the sacrificial layer; and associated microelectronic devices.