公开(公告)号：WO2010126448A2

公开(公告)日：2010-11-04

申请号：PCT/SE2010050479

申请日：2010-04-30

Applicant: SILEX MICROSYSTEMS AB ,  EBEFORS THORBJOERN ,  KAELVESTEN EDWARD ,  SVEDIN NIKLAS ,  ERIKSSON ANDERS

Inventor： EBEFORS THORBJOERN ,  KAELVESTEN EDWARD ,  SVEDIN NIKLAS ,  ERIKSSON ANDERS

IPC: H01L23/10

CPC classification number: H01L23/10 ,  B81C1/00269 ,  B81C2203/0118 ,  B81C2203/019 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/13144 ,  H01L2224/29035 ,  H01L2224/29111 ,  H01L2224/29144 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/81895 ,  H01L2224/83805 ,  H01L2224/9211 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/1461 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2224/0401

Abstract: The invention relates to a sealing and bonding material structure for joining semiconductor wafers having monolithically integrated components. The sealing and bonding material are provided in strips forming closed loops. There are provided at least two concentric sealing strips on one wafer. The strips are laid out so as to surround the component(s) on the wafers to be sealed off when wafers are bonded together. The material in said strips is a material bonding said semiconductor wafers together and sealing off the monolithically integrated components when subjected to force and optionally heating. The invention also provides a monolithically integrated electrical and/or mechanical and/or fluidic and/or optical device comprising a first substrate and a second substrate, bonded together with a sealing and bonding structure according to the invention. A method comprises providing a sealing and bonding material structure according to the invention on at least one of two wafers and applying a force and optionally heat to the wafers to join them.

Abstract translation: 本发明涉及用于接合具有单片集成部件的半导体晶片的密封和接合材料结构。 密封和接合材料设置成形成闭环的条带。 在一个晶片上提供至少两个同心密封条。 条带布置成围绕晶片上的部件以在晶片接合在一起时被密封。 所述条带中的材料是将所述半导体晶片结合在一起的材料，并且当经受强制和任选地加热时密封单片集成部件。 本发明还提供了一种单片集成的电气和/或机械和/或流体和/或光学装置，其包括第一基板和第二基板，其与根据本发明的密封和结合结构结合在一起。 一种方法包括在两个晶片中的至少一个晶片上提供根据本发明的密封和接合材料结构，并施加力并且可选地加热到晶片以将它们接合。

公开(公告)号：SE536771C2

公开(公告)日：2014-07-22

申请号：SE1051193

申请日：2008-12-23

Applicant: SILEX MICROSYSTEMS AB

Inventor： EBEFORS THORBJÖRN ,  KÄLVESTEN EDVARD ,  ÅGREN PETER ,  SVEDIN NIKLAS ,  ERICSSON THOMAS

IPC: G02B26/08 ,  B81B7/00

公开(公告)号：SE526366C2

公开(公告)日：2005-08-30

申请号：SE0300784

申请日：2003-03-21

Applicant: SILEX MICROSYSTEMS AB

Inventor： EBEFORS THORBJOERN ,  KAELVESTEN EDVARD ,  SVEDIN NIKLAS ,  HUHTAOJA TOMMY ,  RANGSTEN PELLE

IPC: B81B7/00 ,  H01L21/768 ,  H01L23/48 ,  H01L21/60

公开(公告)号：CA2519893A1

公开(公告)日：2004-09-30

申请号：CA2519893

申请日：2004-03-22

Applicant: SILEX MICROSYSTEMS AB

Inventor： HUHTAOJA TOMMY ,  EBEFORS THORBJOERN ,  KAELVESTEN EDVARD ,  RANGSTEN PELLE ,  SVEDIN NIKLAS

IPC: H01L21/60 ,  B81B7/00 ,  H01L21/768 ,  H01L23/48 ,  H01L29/40

Abstract: The invention relates to a method of making an electrical connection between a first (top) and a second (bottom) surface of a conducting or semi-conducting substrate. It comprising creating a trench in the first surface, and establishing an insulating enclosure entirely separating a portion of said substrate, defined by said trench. It also relates to a product usable as a starting substrate for the manufacture of micro-electronic and/or micro- mechanic devices, comprising a flat substrate of a semi-conducting or conducting material, and having a first and a second surface and at least on e electrically conducting member extending through said substrate. The electrically conducting member is insulated from surrounding material of the flat substrate by a finite layer of an insulating material, and comprises th e same material as the substrate, i.e. it is made from the wafer material.

公开(公告)号：HK1224275A1

公开(公告)日：2017-08-18

申请号：HK16112582

申请日：2016-11-02

Applicant: SILEX MICROSYSTEMS AB

Inventor： KLVESTEN EDVARD ,  EBEFORS THORBJRN ,  SVEDIN NIKLAS

IPC: B81B20060101 ,  B81C20060101 ,  H01L20060101

公开(公告)号：HK1084236A1

公开(公告)日：2006-07-21

申请号：HK06104564

申请日：2006-04-13

Applicant: SILEX MICROSYSTEMS AB

Inventor： KAELVESTEN EDVARD ,  EBEFORS THORBJOERN ,  SVEDIN NIKLAS ,  RANGSTEN PELLE ,  HUHTAOJA TOMMY

IPC: B81B20060101 ,  B81B7/00 ,  H01L20060101 ,  H01L21/768 ,  H01L23/48

Abstract: A method of making an electrical connection between a first (top) and a second (bottom) surface of a conducting or semi-conducting substrate includes creating a trench in the first surface, and establishing an insulating enclosure entirely separating a portion of the substrate, defined by the trench. Also described is a product usable as a starting substrate for the manufacture of micro-electronic and/or micro-mechanic devices, including a flat substrate of a semi-conducting or conducting material, and having a first and a second surface and at least one electrically conducting member extending through the substrate. The electrically conducting member is insulated from surrounding material of the flat substrate by a finite layer of an insulating material, and includes the same material as the substrate, i.e. it is made from the wafer material.

公开(公告)号：SE0300784A

公开(公告)日：2004-09-22

申请号：SE0300784

申请日：2003-03-21

Applicant: SILEX MICROSYSTEMS AB

Inventor： EBEFORS THORBJOERN ,  KAELVESTEN EDVARD ,  SVEDIN NIKLAS ,  HUHTAOJA TOMMY ,  RANGSTEN PELLE

IPC: B81B7/00 ,  H01L21/768 ,  H01L23/48 ,  H01L21/60

CPC classification number: B81B7/0006 ,  H01L21/76898 ,  H01L23/481 ,  H01L2224/05573 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2924/00014 ,  H01L2924/1461 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/05599

公开(公告)号：EP2425450A4

公开(公告)日：2016-10-05

申请号：EP10770036

申请日：2010-04-30

Applicant: SILEX MICROSYSTEMS AB

Inventor： EBEFORS THORBJÖRN ,  KÄLVESTEN EDWARD ,  SVEDIN NIKLAS ,  ERIKSSON ANDERS

IPC: H01L23/10 ,  B81B7/00 ,  B81C1/00

CPC classification number: H01L23/10 ,  B81C1/00269 ,  B81C2203/0118 ,  B81C2203/019 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/13144 ,  H01L2224/29035 ,  H01L2224/29111 ,  H01L2224/29144 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/81895 ,  H01L2224/83805 ,  H01L2224/9211 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/1461 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A sealing and bonding material structure for joining semiconductor wafers having monolithically integrated components. The sealing and bonding material are provided in strips forming closed loops. There are provided at least two concentric sealing strips on one wafer. The strips are laid out so as to surround the component(s) on the wafers to be sealed off when wafers are bonded together. The material in the strips is a material bonding the semiconductor wafers together and sealing off the monolithically integrated components when subjected to force and optionally heating. A monolithically integrated electrical and/or mechanical and/or fluidic and/or optical device including a first substrate and a second substrate, bonded together with the sealing and bonding structure, and a method of providing a sealing and bonding material structure on at least one of two wafers and applying a force and optionally heat to the wafers to join them are described.

公开(公告)号：EP2791049A4

公开(公告)日：2015-04-01

申请号：EP12856909

申请日：2012-12-17

Applicant: SILEX MICROSYSTEMS AB

Inventor： EBEFORS THORBJÖRN ,  SVEDIN NIKLAS

IPC: B81C1/00

CPC classification number: B81C1/00285 ,  B81B7/0038 ,  B81C1/00293 ,  B81C2203/0136 ,  B81C2203/0145

公开(公告)号：SE536769C2

公开(公告)日：2014-07-22

申请号：SE1051391

申请日：2008-12-23

Applicant: SILEX MICROSYSTEMS AB

Inventor： EBEFORS THORBJÖRN ,  KÄLVESTEN EDVARD ,  SVEDIN NIKLAS

IPC: G02B26/08 ,  B81B7/00