公开(公告)号：JP2000200909A

公开(公告)日：2000-07-18

申请号：JP36690699

申请日：1999-12-24

Applicant: ST MICROELECTRONICS SA

Inventor： JEAN JALADE ,  JEAN-LOUIS SANCHEZ ,  LAUR JEAN-PIERRE ,  BREIL MARIE ,  AUSTIN PATRICK ,  BERNIER ERIC ,  MATHIEU ROY

IPC: H01L29/74 ,  H01L21/822 ,  H01L27/04 ,  H01L27/06 ,  H01L29/739 ,  H01L29/78 ,  H01L21/06

Abstract: PROBLEM TO BE SOLVED: To obtain a part of a minimum surface to a fixed maximum current by checking a thyristor type part. SOLUTION: An auxiliary thyristor 13 is a vertical thyristor, and a cathode corresponds to an N-type region N5 formed in a well likewise. A part of a region P4 between regions N4 and N5 is covered with an insulation gate G2 and regions N4-P4-N5 corresponds to an N-channel enhancement MOS transistor M. An IGBT 14 is made a multicellor part. When the surface of a rear is covered with a P-type layer P1, a vertical IGBT is formed, and a cathode corresponds to metallization formed on regions P6, N6 and an anode corresponds to a surface at a rear side of a part. For a cell corresponding to a well P6, conduction takes place starting from an anode A towards metallization which covers the source N6, and the region N5 and then towards the region N4 and a cathode K. Next, conduction of a thyristor is checked.

公开(公告)号：DE69938814D1

公开(公告)日：2008-07-10

申请号：DE69938814

申请日：1999-12-28

Applicant: ST MICROELECTRONICS SA

Inventor： JALADE JEAN ,  SANCHEZ JEAN-LOUIS ,  LAUR JEAN-PIERRE ,  BREIL MARIE ,  AUSTIN PATRICK ,  BERNIER ERIC ,  ROY MATHIEU

IPC: H01L27/06 ,  H01L29/74 ,  H01L21/822 ,  H01L27/04 ,  H01L29/739 ,  H01L29/78

公开(公告)号：DE69715746T2

公开(公告)日：2003-05-22

申请号：DE69715746

申请日：1997-07-09

Applicant: ST MICROELECTRONICS SA

Inventor： QUOIRIN JEAN-BAPTISTE ,  JALADE JEAN ,  SANCHEZ JEAN-LOUIS ,  LAUR JEAN-PIERRE

IPC: H02H3/02 ,  H02H9/02 ,  H01L27/06

Abstract: Three interconnected transistors are used to limit or cut off current flowing between terminals (A,K). A first transistor (NMOSD1) has it's collector connected to the first terminal (A) and it's base to the second terminal (K). A second complementary transistor (PMOSD) is connected to terminal (K) and the first transistor's emitter. The base of the second transistor is connected to the emitter of a third transistor (NMOSD2) and the third transistor has it's collector connected to terminal (A) and it's base connected to terminal (K). A Zener diode is connected between the emitter and base of the third transistor.

公开(公告)号：DE69715746D1

公开(公告)日：2002-10-31

申请号：DE69715746

申请日：1997-07-09

Applicant: ST MICROELECTRONICS SA

Inventor： QUOIRIN JEAN-BAPTISTE ,  JALADE JEAN ,  SANCHEZ JEAN-LOUIS ,  LAUR JEAN-PIERRE

IPC: H02H3/02 ,  H02H9/02 ,  H01L27/06

Abstract: Three interconnected transistors are used to limit or cut off current flowing between terminals (A,K). A first transistor (NMOSD1) has it's collector connected to the first terminal (A) and it's base to the second terminal (K). A second complementary transistor (PMOSD) is connected to terminal (K) and the first transistor's emitter. The base of the second transistor is connected to the emitter of a third transistor (NMOSD2) and the third transistor has it's collector connected to terminal (A) and it's base connected to terminal (K). A Zener diode is connected between the emitter and base of the third transistor.