公开(公告)号：EP1988366A1

公开(公告)日：2008-11-05

申请号：EP07425256.0

申请日：2007-04-30

Applicant: STMicroelectronics S.r.l.

Inventor： Ungaretti, Tommaso ,  Jawed, Syed Arsalan ,  Gottardi, Massimo ,  Baschirotto, Andrea

IPC: G01D5/24

CPC classification number: G01D5/24 ,  B06B1/0292 ,  G01L9/0073 ,  G01P1/023 ,  G01P15/125

Abstract: In a capacitive sensor (10), a detection structure (11), of a microelectromechanical type, is provided with a fixed element (4) and a mobile element (5), capacitively coupled to one another, generating a capacitive variation (ΔC m ) as a function of a quantity to be detected, and with a parasitic coupling element (2), capacitively coupled to at least one between the mobile element (5) and the fixed element (4) generating a first parasitic capacitance (27; 28), intrinsic to the detection structure (11); a readout-interface circuit (12) is connected to the detection structure (11) and generates, on an output terminal (23) thereof, an output signal (V out ) as a function of the capacitive variation (ΔC m ). The readout-interface circuit (12) has a feedback path (29) between the output terminal (23) and the parasitic coupling element (2) so as to drive the first intrinsic parasitic capacitance (27; 28) with the output signal (V out ).

Abstract translation: 在电容传感器（10），微机电型的检测结构（11），被提供有固定元件（4）和移动元件（5），电容性地耦合到彼此，生成的电容的变化（“C 米），为量的函数被检测，和带有寄生耦合元件（2），电容的可移动元件（5）和所述固定元件（4）产生第一寄生电容（27之间耦合到至少一个; 28）固有的检测结构（11）; 的读出接口电路（12）被连接到所述检测结构（11）和基因的价格，到输出端子（23）上，以输出信号（V OUT）作为电容变化（“C米）的函数。 所读出的接口电路（12）具有输出端（23）和所述寄生耦合元件（2）之间的反馈路径（29），以便驱动所述第一本征寄生电容（27; 28）与所述输出信号（V 出）。

公开(公告)号：EP0836275B1

公开(公告)日：2002-06-05

申请号：EP96830524.3

申请日：1996-10-11

Applicant: STMicroelectronics S.r.l.

Inventor： Baschirotto, Andrea ,  Nagari, Angelo ,  Castello, Rinaldo

IPC: H03H1/00 ,  H03F3/72 ,  H03F1/08

CPC classification number: H03F3/72 ,  H03F1/086 ,  H03F2200/513

公开(公告)号：EP1168603A1

公开(公告)日：2002-01-02

申请号：EP00830449.5

申请日：2000-06-26

Applicant: STMicroelectronics S.r.l.

Inventor： Baschirotto, Andrea ,  Cusinato, Paolo

IPC: H03F3/45

CPC classification number: H03F3/45708 ,  H03F3/45183 ,  H03F2203/45461 ,  H03F2203/45511 ,  H03F2203/45594 ,  H03F2203/45666

Abstract: Fully-differential, switched-capacitor circuit having a first and second input terminal (5a, 5b), and including: an operational amplifier (2, 41) having a first and a second differential input (4a, 4b), a first and a second output terminal (8a, 8b) and a bias control terminal (17); a feedback network (9a, 9b), connected between the differential outputs (8a, 8b) and the input terminals (5a, 5b), and having intermediate nodes connected to the differential inputs (4a, 4b) of the operational amplifier (2, 41); and a control circuit (3), including a detection network (19) and an error amplifier (20, 21). The error amplifier (20) has a first input receiving a desired common-mode voltage (V XID ), and an output connected to the bias control terminal (17) and supplying a control voltage (V XC ). The detection network (19) has a first and a second input connected directly, respectively, to the second input terminal (4a, 4b) of the operational amplifier (2, 41), and an output connected to a second input of the error amplifier (20), and supplying a common-mode drive voltage (V XCM ).

Abstract translation: 全差分开关电容电路，其具有第一和第二输入端子（5A，5B），并且包括：一个运算放大器（2，41），具有第一和第二差分输入端（4A，4B），一个第一和一个 第二输出端子（8A，8B）和一个偏置控制端（17）; 反馈网络（9A，9B），连接在所述差分输出之间（8A，8B）和所述输入端子（5A，5B），并具有连接到所述差分输入中间节点（4A，4B）的运算放大器（2， 41）; 和控制电路（3），包括检测网络（19）和误差放大器（20，21）。 误差放大器（20）具有连接到偏置控制端子（17）的第一输入端接收期望的共模电压（VXID），并输出和提供控制电压（VXC）。 检测网络（19）具有第一和分别直接连接，一个第二输入端，所述第二输入端（4A，4B）的运算放大器（2，41），以及连接到所述误差放大器的第二输入输出 （20）和供给的共模电压驱动器（VXCM）。

公开(公告)号：EP1172936B1

公开(公告)日：2005-03-09

申请号：EP00830485.9

申请日：2000-07-11

Applicant: STMicroelectronics S.r.l.

Inventor： Gandolfi, Gabriele ,  Baschirotto, Andrea ,  Colonna, Vittorio ,  Cusinato, Paolo

IPC: H03M3/02

CPC classification number: H03M3/502 ,  H03M7/3022

公开(公告)号：EP1458096A1

公开(公告)日：2004-09-15

申请号：EP03425120.7

申请日：2003-02-26

Applicant: STMicroelectronics S.r.l.

Inventor： Baschirotto, Andrea ,  Liguori, Pietro ,  Colonna, Vittorio ,  Gandolfi, Gabriele

IPC: H03H11/12 ,  H03H11/24

CPC classification number: H03H11/1291 ,  H03H7/24 ,  H03H11/24

Abstract: The present invention refers to a control system for the characteristic parameters of an active filter and to the relative method.
In one embodiment the control system for the characteristic parameters of an active filter (10) comprising: a system (20) for the determination of the technological distribution of the components that provides the information (Ein) related to said technological distribution of the components; an elaboration system (40) for said information (Ein) related to said technological distribution of the components; an active filter (10) including at least two programmable passive circuital elements (R1, R2, R3) receiving said information (Ein) related to said technological distribution of the components; said elaboration system (40), being aware of the topology for said active filter (10), comprises means for determining the value for said at least two programmable passive circuital elements (R1, R2, R3); means for correcting the value for said at least two programmable passive circuital elements (R1, R2, R3) according to the value of the information related to said technological distribution of the components; means for determining the programming values (E1, E2, E3) for said at least two programmable passive circuital elements (R1, R2, R3).

Abstract translation: 本发明涉及一种用于有源滤波器的特性参数的控制系统及其相关方法。 在一个实施例中，用于有源滤波器（10）的特性参数的控制系统包括：用于确定提供与所述技术分布相关的信息（Ein）的组件的技术分布的系统（20） 的组件; 用于与所述组件的所述技术分布相关的所述信息（Ein）的详细系统（40） 包括至少两个可编程无源电路元件（R1，R2，R3）的有源滤波器（10），其接收与所述组件的所述技术分布有关的所述信息（Ein）; 所述精细化系统（40）知道所述有源滤波器（10）的拓扑结构，包括用于确定所述至少两个可编程无源电路元件（R1，R2，R3）的值的装置; 用于根据与所述组件的所述技术分布有关的信息的值来校正所述至少两个可编程无源电路元件（R1，R2，R3）的值的装置; 用于确定所述至少两个可编程无源电路元件（R1，R2，R3）的编程值（E1，E2，E3）的装置。

公开(公告)号：EP1324498A1

公开(公告)日：2003-07-02

申请号：EP02012046.5

申请日：2002-05-31

Applicant: STMicroelectronics S.r.l.

Inventor： Gandolfi, Gabriele ,  Baschirotto, Andrea ,  Colonna, Vittorio

IPC: H03M3/00

CPC classification number: H03M3/38 ,  H03M3/37 ,  H03M3/406

Abstract: A method of self-calibrating a modulator comprising at least one integrator (23, 24) liable to incur a phase error is disclosed. Advantageously according to the invention, the calibration method comprises at least one step of reading a response to pulse of said modulator, a step of calculating a phase error parameter (b 1 , b 2 ) of the integrator, and a step of calibrating the phase error parameter (b 1 , b 2 ). In addition, the calibration step provides a count (N1) of response-to-pulse samples lying above suitable threshold values (y1), and a change in the value (Cv) of a capacitor associated with the integrator according to the sample count (N1).
Also disclosed is an integrator system with phase error correction, which comprises an integrator (17), having an input terminal (A) connected to an inverting output terminal (B) through a first feedback capacitor (C1), and a second input capacitor (C2) connected between a first input terminal (IN+) of the integrator system and the input terminal (A) of the integrator (17). Advantageously according to the invention, the integrator system further comprises a phase error correction portion (18) feedback connected between the output terminal (B) and the input terminal (A) of the integrator (17), the correction portion (18) having a variable capacitance value.

Abstract translation: 公开了一种自校准包括至少一个容易产生相位误差的积分器（23,24）的调制器的方法。 有利地，根据本发明，校准方法包括读取对所述调制器的脉冲的响应的至少一个步骤，计算积分器的相位误差参数（b1，b2）的步骤和校准相位误差参数的步骤 （b1，b2）。 此外，校准步骤提供位于合适的阈值（y1）之上的响应脉冲样本的计数（N1），以及根据样本计数与积分器相关联的电容器的值（Cv）的变化（ N1）。 还公开了一种具有相位误差校正的积分器系统，其包括积分器（17），其具有通过第一反馈电容器（C1）连接到反相输出端子（B）的输入端子（A）和第二输入电容器 C2）连接在积分器系统的第一输入端（IN +）和积分器（17）的输入端（A）之间。 有利地，根据本发明，积分器系统还包括连接在积分器（17）的输出端子（B）和输入端子（A）之间的相位误差校正部分（18），校正部分（18）具有 可变电容值。

公开(公告)号：EP1324498B1

公开(公告)日：2005-08-03

申请号：EP02012046.5

申请日：2002-05-31

Applicant: STMicroelectronics S.r.l.

Inventor： Gandolfi, Gabriele ,  Baschirotto, Andrea ,  Colonna, Vittorio

IPC: H03M3/00

CPC classification number: H03M3/38 ,  H03M3/37 ,  H03M3/406

公开(公告)号：EP1324497A1

公开(公告)日：2003-07-02

申请号：EP01830812.2

申请日：2001-12-27

Applicant: STMicroelectronics S.r.l.

Inventor： Gandolfi, Gabriele ,  Colonna, Vittorio ,  Baschirotto, Andrea

IPC: H03M3/00

CPC classification number: H03M3/382 ,  H03M3/406 ,  H03M3/458

Abstract: The present invention relates a method for self-calibrating a frequency of a modulator circuit, said sigma - delta modulator (40) having a go path (15) and a feedback path (19), said go path (15) realized by the series of a resonator circuit (31) and of an analog to digital conversion ADC block (18), said feedback (19) path being realized by a digital to conversion DAC block (19), the inventive method comprising the following succession of steps: a) to apply a pulse (20) in input (IN) to said resonator circuit (31); b) to measure the oscillating frequency of the output signal (4) from said resonator circuit (31) in response of said pulse (20) when the feedback path (19) of said sigma - delta modulator (40) is opened; c) to perform a comparison between said oscillating frequency of said resonator circuit (31) with a frequency (f 0 ) known a priori; d) to modify in a proportional way said oscillating frequency of said resonator circuit (31) in function of said comparison performed at the previous step (c). The inventive circuit has the characteristic that a resonator circuit (31) is composed by at least an integrator filter (16, 17) having on its feedback path a variable gain ("g") amplifier (21), said variable gain ("g") of said amplifier (21) being modified in a proportional way in function of a comparison between the output signal frequency from said resonator circuit (31) due to a pulse (20) response present to its input (IN) and a frequency (f 0 ) known a priori when said feedback path (19) is opened.

Abstract translation: 本发明涉及用于自校准的调制器电路的频率，所述Σ的方法 - 德尔塔调制器具有由串联实现一个去路径（15）和反馈路径（19），所述走路径（15）（40） 谐振器电路（31）和模拟到数字转换ADC块（18）组成，所述反馈（19）路径由一个数字转化DAC块（19），本发明的方法包括以下步骤以下相继实现：一个 ）施加脉冲（20）（在输入端（IN）连接到所述谐振器电路31）; b）至测量的输出信号（4）的振荡频率从所述谐振器电路（31）在当所述Σ的反馈路径（19），所述脉冲（20）的响应 - Δ调制器（40）被打开; c）与先验已知的一个频率（f 0）来执行所述谐振器电路（31）的所述摆动频率之间的比较; D）在成比例的方式修改所述在前面的步骤（c）中进行所述比较的函数，所述谐振器电路（31）的振荡频率。 本发明的电路已经特性没有谐振器电路（31）通过至少在具有其反馈通路上的可变增益（“G”）放大器（21）积分器的过滤器（16,17）组成，所述可变增益（“克 “）的所述放大器（21）被修改以成比例的方式在从所述谐振器电路（31）的输出信号的频率之间的比较的函数，由于其输入端（IN）和一个频率的脉冲（20），响应本（ f 0的）先验已知的，当所述反馈通路（19）被打开。

公开(公告)号：EP1278068A2

公开(公告)日：2003-01-22

申请号：EP02015859.8

申请日：2002-07-16

Applicant: STMicroelectronics S.r.l. ,  Hewlett-Packard Company

Inventor： Lasalandra, Ernesto ,  Ungaretti, Tommaso ,  Baschirotto, Andrea

IPC: G01P15/125 ,  G01P15/13

CPC classification number: G01D5/2417 ,  G01D3/066 ,  G01D5/24 ,  G01P15/125 ,  G01P15/131 ,  G01P2015/0814

Abstract: A method for detecting displacements of a micro-electromechanical sensor (101) including a fixed body (3) and a mobile mass (4), forming at least a first sensing capacitor (107) and a second sensing capacitor (108), which are connected to a first input terminal (102) and, respectively, to a first output terminal (104) and to a second output terminal (105) of the sensing circuit and have a rest common sensing capacitance (Cs). The method includes the steps of: closing a first negative-feedback loop (136), which comprises the first sensing capacitor (107) and the second sensing capacitor (108) and a differential amplifier (124); supplying to at least one input (124b) of the differential amplifier (124) a staircase sensing voltage (Vs) through driving capacitors (121, 122) so as to produce variations (ΔVc) of an electrical driving quantity (Vc) which are inversely proportional to the common sensing capacitance (Cs); and driving the sensor (101) with the electrical driving quantity (Vc) .

Abstract translation: 一种用于检测包括固定体（3）和移动块（4）的微机电传感器（101）的位移，形成至少一个第一感测电容器（107）和第二传感电容器（108），其方法 分别连接到第一输入端子（102）和，第一输出端子（104）和所述感测电路的第二输出端（105）和具有一个休息公共感测电容（CS）。 该方法包括如下步骤：关闭第一负反馈回路（136），其包括第一感测电容器（107）和第二感测电容器（108）和差分放大器（124）; 供给到差分放大器（124）的阶梯感测电压（Vs）通过驱动电容器（121，122），以便产生一个电驱动量的变化（DELTA Vc）的（VC），这些中的至少一个输入端（124B） 成反比公共感测电容（Cs）等 和驱动该传感器（101）与所述电驱动量（Vc）的。

公开(公告)号：EP1172936A1

公开(公告)日：2002-01-16

申请号：EP00830485.9

申请日：2000-07-11

Applicant: STMicroelectronics S.r.l.

Inventor： Gandolfi, Gabriele ,  Baschirotto, Andrea ,  Colonna, Vittorio ,  Cusinato, Paolo

IPC: H03M3/02

CPC classification number: H03M3/502 ,  H03M7/3022

Abstract: The present invention refers to a digital analogical converter comprising a sigma delta cascade modulator having two outputs, particularly a third order sigma delta modulator 2+1.
In an embodiment the digital analogical converter comprises: a sigma delta modulator (1) of the type having two outputs (67, 68) able to supply a first (Y1) and a second (Y2) signal to said two outputs (67, 68); a reconstruction circuit (2) of first said (Y1) and second (Y2) signal able to provide a reconstructed signal (Yout); a filter (3) able to filter said reconstructed signal (Yout); characterized in that said reconstruction circuit (2) combines said first (Y1) and second (Y2) signals according to the following relationship Yout= Y1* (1+ Z -1 ) - Y2* (1- Z -1 ) + Y2* Z -2 * (1- Z -1 )    where
Yout corresponds to said reconstructed signal, Y1 corresponds to said first signal, Y2 corresponds to said according to signal, Z corresponds to the Z transform.

Abstract translation: 本发明涉及包括具有两个输出的Σ-Δ级联调制器的数字模拟转换器，特别是三阶Σ-Δ调制器2 + 1。 在一个实施例中，数字模拟转换器包括：具有两个能够向所述两个输出端（67,68）提供第一（Y1）和第二（Y2））信号的两个输出端（6,7,68）的Σ-Δ调制器（1） ）; 第一所述（Y1）和第二（Y2）信号的重建电路（2）能够提供重建信号（Yout）; 能够对所述重建信号（Yout）进行滤波的滤波器（3）; 其特征在于，所述重构电路（2）根据以下关系组合所述第一（Y1）和第二（Y2）信号：Yout = Y1 *（1+ Z -1） - Y2 *（1-Z < 其中Yout对应于所述重建信号，Y1对应于所述第一信号，Y2对应于所述根据信号的Z（Z-1>）+ Y2 * Z < 对应于Z变换。