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    팬-아웃 반도체 패키지
    91.
    发明授权
    팬-아웃 반도체 패키지 有权

    公开(公告)号：KR101892876B1

    公开(公告)日：2018-08-28

    申请号：KR1020170164201

    申请日：2017-12-01

    Applicant: 삼성전기주식회사

    Inventor： 김한 ,  김성한 ,  김석환

    IPC: H01L25/07 ,  H01L23/485 ,  H01L23/31 ,  H01L23/28 ,  H01L23/538

    CPC classification number: H01L25/073 ,  H01L23/28 ,  H01L23/3171 ,  H01L23/485 ,  H01L23/5384 ,  H01L2224/02379 ,  H01L2224/0401

    Abstract: 본개시는접속패드가배치된활성면및 상기활성면의반대측인비활성면을갖는반도체칩, 상기반도체칩의적어도일부를봉합하는봉합재, 상기반도체칩의활성면상에배치되며상기접속패드와전기적으로연결된재배선층을포함하는연결부재, 상기연결부재상에배치되며상기재배선층의적어도일부를노출시키는개구부를갖는패시베이션층, 상기패시베이션층의개구부상에배치되며상기노출된재배선층과연결된금속부재, 및상기패시베이션층상에배치되며상기금속부재와연결된전기연결구조체를포함하며, 상기전기연결구조체는상기금속부재의사이즈에따라서계층적으로차별화된높이를갖는, 팬-아웃반도체패키지에관한것이다.

    팬-아웃 반도체 패키지
    93.
    发明公开
    팬-아웃 반도체 패키지 审中-实审
    扇出半导体封装

    公开(公告)号：KR1020170143413A

    公开(公告)日：2017-12-29

    申请号：KR1020160112983

    申请日：2016-09-02

    Applicant: 삼성전기주식회사

    Inventor： 반영민 ,  김한 ,  정경문

    IPC: H01L23/31 ,  H01L23/498 ,  H01L23/48 ,  H01L23/525 ,  H01L23/00

    CPC classification number: H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/18 ,  H01L2224/73204 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/00012

    Abstract: 본개시는관통홀을갖는제1연결부재, 제1연결부재의관통홀에배치되며접속패드가배치된활성면및 활성면의반대측에배치된비활성면을갖는반도체칩, 제1연결부재및 반도체칩의비활성면의적어도일부를봉합하는봉합재, 및제1연결부재및 반도체칩의활성면상에배치된제2연결부재를포함하며, 제1 및제2연결부재는각각접속패드와전기적으로연결된재배선층을포함하고, 반도체칩은접속패드의적어도일부를노출시키는개구부를갖는패시베이션막을포함하며, 제2연결부재의재배선층은비아를통하여접속패드와연결되며, 비아는패시베이션막의적어도일부를덮는, 팬-아웃반도체패키지에관한것이다.

    Abstract translation: 本发明是第一连接构件，第一连接设置在贯通孔的半导体芯片bujaeui，第一连接构件和具有设置在所述有源面的相反侧和所述有源表面上的惰性表面的半导体芯片连接到焊盘布置在具有通孔 以及设置在半导体芯片的有源表面上的第一连接构件和第二连接构件，其中第一和第二连接构件各自包括电连接到连接焊盘的重布线层， 包括在内，该半导体芯片包括具有开口的至少暴露所述连接焊盘的一部分的钝化膜，所述第二连接bujaeui再分配层被连接到通过通孔的连接焊盘，所述通孔覆盖所述钝化层至少部分，扇出 到半导体封装。

    무선 전력 수신 장치 및 이를 포함하는 기기
    96.
    发明公开
    무선 전력 수신 장치 및 이를 포함하는 기기 有权
    一种无线电力接收装置及其装置

    公开(公告)号：KR1020170004834A

    公开(公告)日：2017-01-11

    申请号：KR1020160029796

    申请日：2016-03-11

    Applicant: 삼성전기주식회사

    Inventor： 이상종 ,  김한 ,  윤태호 ,  허강헌 ,  장수봉

    IPC: H02J50/00 ,  H01F38/14 ,  H02J7/02

    Abstract: 본출원은무선전력전송기술이적용되는무선전력수신장치및 이장치를포함하는기기에관한것으로서, 본발명의일 실시예에따른무선전력수신장치는적어도일부가외곽영역에배치되며, 데이터의송신및/또는수신에사용되는제1 코일과, 상기외곽영역의안쪽경계선내부에배치되고, 무선으로전송된전력을수신하는제2 코일을포함하고, 상기제2 코일의안쪽경계선의중심과상기제2 코일의바깥쪽경계선의중심은상이하다.

    커패시터 내장형 기판
    98.
    发明公开
    커패시터 내장형 기판 有权
    电容器嵌入式PCB（印刷电路板）

    公开(公告)号：KR1020140003955A

    公开(公告)日：2014-01-10

    申请号：KR1020120071875

    申请日：2012-07-02

    Applicant: 삼성전기주식회사

    Inventor： 이두환 ,  류종인 ,  박대현 ,  김한

    IPC: H05K1/16 ,  H05K3/46 ,  H01G4/33

    CPC classification number: H05K1/182 ,  H05K1/0231 ,  H05K1/185

    Abstract: The present invention relates to a capacitor embedded board. The capacitor embedded board according to the present invention includes: first to fourth layers which form a stacked structure of four layers; and at least one capacitor which is embedded in the second layer and the third layer among the first to fourth layers. Capacitors embedded in the second layer and the third layer are respectively and electrically connected to at least one among power terminals and grounding terminals of active devices and form a mutually parallel connection structure of the capacitors by unifying the wires of the power terminal in the second layer or the third layer. By the present invention, the capacitors are embedded in a base board of the stacked structure with multiple layers. The capacitor embedded board is formed to reduce impedance in a whole frequency area and has high capacitance and low equivalent inductance by efficiently connecting the capacitors embedded in the base board in parallel.

    Abstract translation: 本发明涉及一种电容器嵌入式板。 根据本发明的电容器嵌入板包括：形成四层的叠层结构的第一至第四层; 以及嵌入第一层和第三层中的第二层和第三层中的至少一个电容器。 嵌入在第二层和第三层中的电容器分别电连接到有源器件的电源端子和接地端子中的至少一个，并且通过将第二层中的电源端子的电线统一起来形成电容器的相互平行的连接结构 或第三层。 通过本发明，将电容器嵌入具有多层的层叠结构的基板。 电容器嵌入板形成为通过有效地将嵌入基板中的电容器并联连接来降低整个频率区域的阻抗并具有高电容和低等效电感。

    회로기판 및 그 제조방법
    99.
    发明授权
    회로기판 및 그 제조방법 有权
    电路板及其制造方法

    公开(公告)号：KR101216164B1

    公开(公告)日：2012-12-28

    申请号：KR1020110074614

    申请日：2011-07-27

    Applicant: 삼성전기주식회사

    Inventor： 반영민 ,  김한

    IPC: H05K3/46 ,  H05K3/00 ,  H05K1/02

    Abstract: PURPOSE: A circuit board and manufacturing method thereof are provided to manufacture a thin type board by controlling a curved state of a circuit board. CONSTITUTION: A circuit board is divided into a circuit area and a dummy area. A circuit is formed on a circuit area(110). A dummy area(120) is arranged around external parts of the circuit area. A plurality of slits is consecutively arranged according to an external end unit of the dummy area. A penetration hole(130) passes through the circuit board for cutting the circuit board as a circuit unit.

    Abstract translation: 目的：提供电路板及其制造方法，以通过控制电路板的弯曲状态来制造薄型板。 构成：电路板分为电路区和虚拟区。 电路形成在电路区域（110）上。 虚拟区域（120）围绕电路区域的外部部分布置。 多个狭缝根据虚拟区域的外部端单元连续布置。 穿孔（130）穿过电路板，用于将电路板切割成电路单元。

    인쇄회로기판
    100.
    发明公开
    인쇄회로기판 无效
    印刷电路板

    公开(公告)号：KR1020120023440A

    公开(公告)日：2012-03-13

    申请号：KR1020100086607

    申请日：2010-09-03

    Applicant: 삼성전기주식회사

    Inventor： 김한 ,  정율교

    IPC: H05K9/00 ,  H05K1/02

    Abstract: PURPOSE: A printed circuit board is provided to replace a silicon diode with a printed circuit board structure by forming a voltage transform insulating layer in the outermost layer. CONSTITUTION: A first circuit layer(110) is formed in the exterior of a core layer(100). An insulating layer(210) and a second circuit layer(220) are respectively laminated in the core layer A build-up layer(200) comprises the insulating layer and the second circuit layer. The outermost layer circuit layer of the build-up layer is formed in the outermost insulating layer. A voltage change insulating layer(300) covers up the whole of the outermost insulating layer whole.

    Abstract translation: 目的：提供印刷电路板，通过在最外层形成电压变换绝缘层来替代具有印刷电路板结构的硅二极管。 构成：在芯层（100）的外部形成第一电路层（110）。 绝缘层（210）和第二电路层（220）分别层压在芯层A中，堆积层（200）包括绝缘层和第二电路层。 堆积层的最外层电路层形成在最外绝缘层中。 电压变化绝缘层（300）整体覆盖整个最外层绝缘层。

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