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公开(公告)号：KR1020080001241A
公开(公告)日：2008-01-03
申请号：KR1020060059439
申请日：2006-06-29
Applicant: 삼성전자주식회사
CPC classification number: H01H59/0009 , B81B3/001 , B81B2201/014 , B81B2201/016
Abstract: A MEMS(Micro Electro Mechanical System) switch with a movable beam and a manufacturing method thereof are provided to prevent the movable beam from being stuck and to deliver a signal stably by increasing contact force between the movable beam and a signal line. A MEMS switch comprises a substrate(10), at least one signal line(20) and an electrode(30), and a movable beam(40). The signal line and the electrode are formed at the substrate. The movable beam is installed at an upper part of the substrate at a predetermined interval and short-cut from the signal line according to an operation of the electrode. The movable beam includes a body portion(41) and a supporting portion(42). Modulus of the body portion is larger than the modulus of the supporting portion. A manufacturing method the MEMS switch includes a step of forming at least one signal line and the electrodes on the substrate, and a step of installing the movable beam whose modulus of the body portion is larger than the modulus of the supporting portion at the upper part of the substrate.
Abstract translation: 提供具有可移动光束的MEMS（微电子机械系统）开关及其制造方法，以防止可移动光束被卡住，并通过增加可移动光束与信号线之间的接触力来稳定地传递信号。 MEMS开关包括衬底（10），至少一个信号线（20）和电极（30）以及可移动光束（40）。 信号线和电极形成在基板上。 可移动光束以预定间隔安装在基板的上部，并且根据电极的操作从信号线进行短切。 可动梁包括主体部分（41）和支撑部分（42）。 主体部分的模量大于支撑部分的模量。 MEMS开关的制造方法包括在基板上形成至少一条信号线和电极的步骤，以及安装主体部分的模量大于上部的支撑部分的模量的可移动梁的步骤 的基底。
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公开(公告)号：KR100787217B1
公开(公告)日：2007-12-21
申请号：KR1020060064527
申请日：2006-07-10
Applicant: 삼성전자주식회사
CPC classification number: G02B26/0841 , B81B2201/016 , B81C1/00571 , H01H1/0036 , H01H1/58 , H01H59/0009 , H01H2001/0052
Abstract: A MEMS structure and a method for manufacturing thereof are provided to prevent an electric defect regardless of occurrence of a notch by making an area where the notch occurs thin. A MEMS structure is includes a substrate for an element(100), an electrode pad(200), a MEMS activating element(300), a connecting line(400), and a package substrate(500). The substrate for the element has an electrode and the MEMS activating element on an upper surface. The electrode pad is one of a ground electrode and a driving electrode. And the electrode is generally made of Au. The MEMS activating element is bonded on the upper surface of the substrate the element. And the MEMS activating element is generally made of Si series. A side lower part of the MEMS activating element has an electrode connection layer(310). The connecting line electrically connects the electrode pad and the electrode connection layer.
Abstract translation: 提供了一种MEMS结构及其制造方法，通过使切口发生较薄的区域，能够防止缺陷发生而导致电气缺陷。 MEMS结构包括用于元件（100），电极焊盘（200），MEMS激活元件（300），连接线（400）和封装衬底（500）的衬底。 用于元件的衬底在上表面上具有电极和MEMS激活元件。 电极焊盘是接地电极和驱动电极之一。 并且电极通常由Au制成。 MEMS激活元件结合在基板的上表面上。 MEMS激活元件通常由Si系列制成。 MEMS激活元件的侧下部具有电极连接层（310）。 连接线将电极焊盘和电极连接层电连接。
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公开(公告)号：KR1020070073717A
公开(公告)日：2007-07-10
申请号：KR1020070063668
申请日：2007-06-27
Applicant: 삼성전자주식회사
IPC: H03H9/56
CPC classification number: H03H9/0542 , H03H9/542 , H03H9/564 , H03H9/566
Abstract: A filter using one trimming inductor is provided to reduce a size of the filter and simplify a manufacturing process by using one trimming inductor. A filter using one trimming inductor includes a substrate, first and second series resonators(210,220), a first parallel resonator(310), a second parallel resonator(320), a trimming inductor(400), and a third parallel resonator. The substrate has a first port, a second port, and a ground port which are electrically connected to an external terminal. The first and second series resonators(210,220) connect the first port to the second port in series on the substrate. The first parallel resonator(310) is connected to a node formed between the first port and the first series resonator(310) on the substrate. The second parallel resonator(320) is connected to a node formed between the first series resonator(210) and the second series resonator(220) on the substrate. A side of the trimming inductor(400) is connected to the first and second parallel resonators(310,320). The other side of the trimming inductor(400) is connected to the ground port. A side of the third parallel resonator is connected to the second port on the substrate. The other side of the third parallel resonator is connected to the ground port. The third parallel resonator attenuates a frequency signal of a low band from a frequency pass band of the filter. At least one of the first to third parallel resonators(310,320) and the first and second series resonators(210,220) has a cavity and a via-hole formed at a lower part of the cavity.
Abstract translation: 提供使用一个微调电感器的滤波器来减小滤波器的尺寸并且通过使用一个微调电感器来简化制造过程。 使用一个修整电感器的滤波器包括衬底，第一和第二串联谐振器（210,220），第一并联谐振器（310），第二并联谐振器（320），微调电感器（400）和第三并联谐振器。 基板具有电连接到外部端子的第一端口，第二端口和接地端口。 第一和第二串联谐振器（210,220）将第一端口与第二端口串联连接在基板上。 第一并联谐振器（310）连接到形成在基板上的第一端口和第一串联谐振器（310）之间的节点。 第二并联谐振器（320）连接到形成在基板上的第一串联谐振器（210）和第二串联谐振器（220）之间的节点。 修整电感器（400）的一侧连接到第一和第二并联谐振器（310,320）。 修整电感器（400）的另一侧连接到接地端口。 第三并联谐振器的一侧连接到基板上的第二端口。 第三并联谐振器的另一侧连接到接地端口。 第三并联谐振器从滤波器的频带衰减低频带的频率信号。 第一至第三并联谐振器（310,320）和第一和第二串联谐振器（210,220）中的至少一个具有形成在空腔的下部的空腔和通孔。
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公开(公告)号：KR100699488B1
公开(公告)日：2007-03-26
申请号：KR1020050065508
申请日：2005-07-19
Applicant: 삼성전자주식회사
IPC: H03H3/007
CPC classification number: H01L23/10 , H01F17/0006 , H01F27/027 , H01L23/49838 , H01L23/645 , H01L2924/16152
Abstract: 인덕터를 포함한 패키징 칩이 개시된다. 본 패키징 칩은, 소정 회로소자가 실장된 기판, 기판 상부 표면 상에 제작된 포트, 기판 상에서 회로소자의 일 단자 및 포트와 각각 전기적으로 연결된 실링부, 및, 실링부를 통해 기판과 접합되어 회로소자를 패키징하는 패키징 기판을 포함한다. 이 경우, 실링부는 도전성 물질로 제작되어, 소정 크기의 인덕턴스를 가지게 되어 인덕터 역할을 한다. 또한, 포트는, 시그널 포트 및 그라운드 포트를 포함할 수 있다. 이 경우, 실링부는, 기판의 가장 자리에 적층된 실링 라인, 시그널 포트 및 그라운드 포트 중 하나와 실링 라인을 전기적으로 연결하는 제1 연결라인, 및, 회로소자의 일 단자와 실링 라인을 전기적으로 연결하는 제2 연결라인을 포함한다. 이에 따라, 인덕터가 내장된 패키징 칩을 소형으로 구현할 수 있다.
패키징, 실링부, 인덕터, 인덕턴스-
Patent Agency Ranking
公开(公告)号：KR100698287B1
公开(公告)日：2007-03-22
申请号：KR1020050008706
申请日：2005-01-31
Applicant: 삼성전자주식회사
Abstract: 본 발명의 박막벌크음향공진기는, 소정 크기의 에어갭이 식각되어 관통형성된 기판과: 에어갭의 상부에 위치되며, 제1전극, 압전막 및 제2전극이 차례로 적층된 공진부; 및 에어갭과 공진부 사이에 설치되어 에어갭의 형성을 형성시 식각깊이를 제한하여 공진부의 손상을 방지하는 식각 저지층;를 포함하는 것을 특징으로 한다.
FBAR, 에어갭, 질화알루미늄(AlN), 크롬(Cr), 식각, 공진부-
公开(公告)号：KR1020070010711A
公开(公告)日：2007-01-24
申请号：KR1020050065508
申请日：2005-07-19
Applicant: 삼성전자주식회사
IPC: H03H3/007
CPC classification number: H01L23/10 , H01F17/0006 , H01F27/027 , H01L23/49838 , H01L23/645 , H01L2924/16152
Abstract: A packaging chip having an inductor is provided to reduce a chip size and improve a Q value by implementing an inductor with a sealing material which is used in packaging and is stacked widely on an edge of a substrate. A packaging chip having an inductor includes a substrate(100), a port(120), a sealing unit(130), and a packaging substrate(160). A predetermined circuit element is mounted on the substrate(100). A port(120) is formed on an upper surface of the substrate(100). The sealing unit(130) is electrically connected to an end of the circuit element and the port(120) on the substrate(100). The packaging substrate(160) is contacted with the substrate(100) through the sealing unit(130), and packages the circuit element. The sealing unit(130) is made of a conductive material and has an inductance of a predetermined amplitude. The port(120) includes a signal port and a ground port.
Abstract translation: 提供了一种具有电感器的封装芯片，通过使用封装材料的电感器实现电感，从而减小了芯片尺寸并提高了Q值，并将其广泛堆叠在基板的边缘上。 具有电感器的封装芯片包括基板（100），端口（120），密封单元（130）和封装基板（160）。 预定电路元件安装在基板（100）上。 在基板（100）的上表面上形成有端口（120）。 密封单元（130）电连接到电路元件的端部和基板（100）上的端口（120）。 包装衬底（160）通过密封单元（130）与衬底（100）接触，并封装电路元件。 密封单元（130）由导电材料制成并且具有预定振幅的电感。 端口（120）包括信号端口和接地端口。
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公开(公告)号：KR100662848B1
公开(公告)日：2007-01-02
申请号：KR1020050126049
申请日：2005-12-20
Applicant: 삼성전자주식회사
IPC: H01L27/02
Abstract: An inductor integrated chip and a method of manufacturing the same are provided to reduce a resistance value and a parasitic component by applying an electric current to an inductor through a connection electrode formed on a packaging wafer. An inductor integrated chip includes a wafer(110), an inductor(130) layered on one surface of the wafer, a circuit element(140) provided on the surface of the wafer and connected to one end of the inductor, a packaging wafer(180) adhered on the surface of the wafer to package the circuit element, and connection electrodes(160,170) formed on the packaging wafer and connected to the other end of the inductor. The connection electrode has a surface-type connection electrode connected to the other end of the inductor and a penetration-type connection electrode connected to the surface-type connection electrode.
Abstract translation: 提供了一种电感器集成芯片及其制造方法，以通过在封装晶片上形成的连接电极向电感器施加电流来降低电阻值和寄生成分。 电感集成芯片包括晶片（110），在晶片的一个表面上层叠的电感器（130），在晶片的表面上提供并连接到电感器的一端的电路元件（140），封装晶片 180）粘附在晶片的表面上以封装电路元件，连接电极（160,170）形成在封装晶片上并连接到电感器的另一端。 连接电极具有连接到电感器的另一端的表面型连接电极和连接到表面型连接电极的穿透型连接电极。
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公开(公告)号：KR100661350B1
公开(公告)日：2006-12-27
申请号：KR1020040112699
申请日：2004-12-27
Applicant: 삼성전자주식회사
IPC: B81B7/02
CPC classification number: B81C1/00269
Abstract: 본 발명에 의한 MEMS 소자 패키지는, MEMS 활성소자가 상면에 형성되어 있는 소자용 기판; MEMS 활성소자가 위치하는 공간 및 MEMS 활성소자의 전기적 경로를 제공하는 것으로, MEMS 활성소자의 양측에 배치되며, 제 1 패드 및 제 2 패드가 일정간격을 두고 대향된 구조의 내부전극패드; 내부전극패드의 외곽에 배치되는 실링패드; 실링패드를 통하여 소자용 기판과 결합되며, 내부전극패드의 간격이 위치하는 부분에 비아홀이 형성된 덮개용 기판; 일단이 내부전극패드와 접촉하도록 비아홀의 내측면에 형성된 연결부재; 및 연결부재의 타단과 접촉하도록 덮개용 기판의 상면에 형성된 외부전극패드;를 포함한다.
MEMS, 소자, 패키지, 웨이퍼, 기판, 비아홀, Au, 전극, 실링-
公开(公告)号：KR1020060126155A
公开(公告)日：2006-12-07
申请号：KR1020050047854
申请日：2005-06-03
Applicant: 삼성전자주식회사
IPC: H01L23/04
CPC classification number: H01L23/055 , H01L23/04 , H01L27/14618 , H01L2224/16
Abstract: A packaging chip is provided to increase a plating speed by preventing voids or clearance from being formed in a packaging wafer in a process for packaging a circuit module. A predetermined circuit module is formed in a predetermined region on the upper surface of a base wafer. A cavity(260) is formed in a predetermined region on the lower surface of a packaging wafer(210). The packaging wafer is coupled to the base wafer to that the circuit module is positioned in the cavity. The upper and the lower surface of a region of the cavity in the packaging wafer are interconnected by a connection electrode(280). A seed layer(270) is positioned between the connection electrode and the packaging wafer. A metal layer(230) is formed in a predetermined region on the lower surface of the package wafer. A UBM(under bump metallurgy) layer is stacked in a predetermined region on the metal layer. A bonding layer(250) is formed in a predetermined region on the upper surface of the base wafer, bonded to the UBM layer to connect the packaging wafer with the base wafer. The UBM layer and the circuit module are connected by a bump.
Abstract translation: 提供一种封装芯片，用于通过在封装电路模块的过程中防止在封装晶片中形成空隙或间隙来提高电镀速度。 预定电路模块形成在基底晶片的上表面上的预定区域中。 在包装晶片（210）的下表面上的预定区域中形成空腔（260）。 封装晶片与基底晶片相连，电路模块位于空腔中。 包装晶片中空腔区域的上表面和下表面通过连接电极（280）互连。 种子层（270）位于连接电极和封装晶片之间。 金属层（230）形成在封装晶片的下表面上的预定区域中。 UBM（凸块下金属）层叠在金属层上的预定区域中。 在基片的上表面上的预定区域中形成接合层（250），其结合到UBM层以将封装晶片与基底晶片连接。 UBM层和电路模块通过凸块连接。
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