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    Manufacturing method of functional device and manufacturing method of semiconductor device, which uses functional device manufactured by the same
    96.
    发明专利
    Manufacturing method of functional device and manufacturing method of semiconductor device, which uses functional device manufactured by the same 审中-公开
    功能器件的制造方法和半导体器件的制造方法，其使用由其制造的功能器件

    公开(公告)号：JP2010087280A

    公开(公告)日：2010-04-15

    申请号：JP2008255413

    申请日：2008-09-30

    Applicant: Panasonic Electric Works Co Ltd ,  パナソニック電工株式会社

    Inventor： TSUJI KOJI ,  HAGIWARA YOSUKE ,  USHIYAMA NAOKI

    IPC: H01L21/301 ,  B81C99/00

    CPC classification number: B81C1/00873 ,  B81B2207/012 ,  B81C2201/053

    Abstract: PROBLEM TO BE SOLVED: To provide a manufacturing method of a functional device which is superior in mass production and can improve performance without damaging the functional device at the time of manufacturing, and to provide a manufacturing method of the semiconductor device using the method. SOLUTION: In the manufacturing method of the functional device 10, a hollow 5 which spatially separates a part of a functional thin film 2 formed on one surface of a silicon substrate (substrate) 1 is formed in the silicon substrate 1. When forming and separating the functional device 10 on one surface of a silicon wafer (wafer) 3 becoming a base, a dicing sheet 7 is stuck to the other surface of the silicon wafer 3 and a temporary fixing sheet 6 is directly stuck to one surface. The silicon wafer 3 is cut from a temporary fixing sheet 6, the temporary fixing sheet 6 is peeled from the functional device 10 and then organic substances existing on surfaces of the functional devices 10 are removed by dry processing in the manufacturing method of the functional device. COPYRIGHT: (C)2010,JPO&INPIT

    Abstract translation: 要解决的问题：提供一种功能性装置的制造方法，该制造方法在制造时质量优良且可以提高性能而不损坏功能元件，并且提供使用该半导体装置的半导体装置的制造方法 方法。 解决方案：在功能器件10的制造方法中，在硅衬底1中形成空穴分离在硅衬底（衬底）1的一个表面上形成的功能性薄膜2的一部分的中空体5。 在作为基底的硅晶片（晶片）3的一个表面上形成和分离功能元件10，将切割片7粘贴到硅晶片3的另一个表面，并且临时固定片6直接粘附到一个表面。 从临时固定片6切割硅晶片3，将临时固定片6从功能元件10剥离，然后在功能元件的制造方法中通过干式处理除去存在于功能元件10的表面的有机物质 。 版权所有（C）2010，JPO＆INPIT

    RELEASE CHEMICAL PROTECTION FOR INTEGRATED COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR (CMOS) AND MICRO-ELECTRO-MECHANICAL (MEMS) DEVICES
    97.
    发明公开
    RELEASE CHEMICAL PROTECTION FOR INTEGRATED COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR (CMOS) AND MICRO-ELECTRO-MECHANICAL (MEMS) DEVICES 有权
    化学释放保护为一体的互补金属半导体（CMOS） - 和微机电（MEMS）器件

    公开(公告)号：EP2995586A1

    公开(公告)日：2016-03-16

    申请号：EP15183869.5

    申请日：2015-09-04

    Applicant: InvenSense, Inc.

    Inventor： DANEMAN, Michael J. ,  ASSADERAGHI, Fariborz

    IPC: B81C1/00

    CPC classification number: B81C1/00246 ,  B81B7/0025 ,  B81B7/007 ,  B81B2207/015 ,  B81C1/00531 ,  B81C1/00539 ,  B81C1/00801 ,  B81C2201/0132 ,  B81C2201/0133 ,  B81C2201/053 ,  B81C2203/0735

    Abstract: Systems and methods that protect CMOS layers from exposure to a release chemical are provided. The release chemical is utilized to release a micro-electromechanical (MEMS) device integrated with the CMOS wafer. Sidewalls of passivation openings created in a complementary metal-oxide-semiconductor (CMOS) wafer expose a dielectric layer of the CMOS wafer that can be damaged on contact with the release chemical. In one aspect, to protect the CMOS wafer and prevent exposure of the dielectric layer, the sidewalls of the passivation openings can be covered with a metal barrier layer that is resistant to the release chemical. Additionally or optionally, an insulating barrier layer can be deposited on the surface of the CMOS wafer to protect a passivation layer from exposure to the release chemical.

    Abstract translation: 系统和方法做了保护层CMOS暴露于化学版本提供。 释放化学被用来释放与CMOS晶片集成微机电（MEMS）装置。 在互补金属氧化物半导体（CMOS）晶片中创建钝化开口的侧壁暴露所述CMOS晶片的介电层也可以与所述化学释放接触而损坏。 在一个方面，以保护CMOS晶片和防止介电层的曝光，钝化开口的侧壁可覆盖有一金属阻挡层所做的是在化学释放具有抗性。 另外地或可选地，为了绝缘势垒层可以在CMOS晶片的表面上沉积保护钝化层免于暴露于化学释放。

    MEMS CHIP AND MANUFACTURING METHOD THEREFOR
    98.
    发明公开
    MEMS CHIP AND MANUFACTURING METHOD THEREFOR 审中-公开
    MEMS-CHIP UND HERSTELLUNGSVERFAHRENDAFÜR

    公开(公告)号：EP2857348A4

    公开(公告)日：2016-01-13

    申请号：EP13813814

    申请日：2013-06-29

    Applicant: CSMC TECHNOLOGIES FAB1 CO LTD

    Inventor： DAI DAN ,  ZHANG XINWEI ,  ZHOU GUOPING ,  XIA CHANGFENG

    IPC: B81B7/00 ,  B81C1/00 ,  H01L27/00

    CPC classification number: B81C1/00825 ,  B81B7/0029 ,  B81C1/0038 ,  B81C2201/0167 ,  B81C2201/053

    Abstract: A MEMS chip (100) includes a silicon substrate layer (110), a first oxidation layer (120) and a first thin film layer (130). The silicon substrate layer includes a front surface (112) for a MEMS process and a rear surface (114), both the front surface and the rear surface being polished surfaces. The first oxidation layer is mainly made of silicon dioxide and is formed on the rear surface of the silicon substrate layer. The first thin film layer is mainly made of silicon nitride and is formed on the surface of the first oxidation layer. In the above MEMS chip, by sequentially laminating a first oxidation layer and a first thin film layer on the rear surface of a silicon substrate layer, the rear surface is effectively protected to prevent the scratch damage in the course of a MEMS process. A manufacturing method for the MEMS chip is also provided.

    Abstract translation: MEMS芯片（100）包括硅衬底层（110），第一氧化层（120）和第一薄膜层（130）。 硅衬底层包括用于MEMS工艺的前表面（112）和后表面（114），前表面和后表面都是​​抛光表面。 第一氧化层主要由二氧化硅制成，并形成在硅衬底层的后表面上。 第一薄膜层主要由氮化硅制成并形成在第一氧化层的表面上。 在上述MEMS芯片中，通过在硅衬底层的后表面依次层叠第一氧化层和第一薄膜层，可有效地保护背面以防止MEMS工艺过程中的划痕损伤。 还提供了用于MEMS芯片的制造方法。

    MEMS CHIP AND MANUFACTURING METHOD THEREFOR
    99.
    发明公开
    MEMS CHIP AND MANUFACTURING METHOD THEREFOR 审中-公开
    MEMS芯片及其制造方法

    公开(公告)号：EP2857348A1

    公开(公告)日：2015-04-08

    申请号：EP13813814.4

    申请日：2013-06-29

    Applicant: CSMC Technologies Fab1 Co., Ltd.

    Inventor： DAI, Dan ,  ZHANG, Xinwei ,  ZHOU, Guoping ,  XIA, Changfeng

    IPC: B81B7/00 ,  B81C1/00 ,  H01L27/00

    CPC classification number: B81C1/00825 ,  B81B7/0029 ,  B81C1/0038 ,  B81C2201/0167 ,  B81C2201/053

    Abstract: A MEMS chip (100) includes a silicon substrate layer (110), a first oxidation layer (120) and a first thin film layer (130). The silicon substrate layer includes a front surface (112) for a MEMS process and a rear surface (114), both the front surface and the rear surface being polished surfaces. The first oxidation layer is mainly made of silicon dioxide and is formed on the rear surface of the silicon substrate layer. The first thin film layer is mainly made of silicon nitride and is formed on the surface of the first oxidation layer. In the above MEMS chip, by sequentially laminating a first oxidation layer and a first thin film layer on the rear surface of a silicon substrate layer, the rear surface is effectively protected to prevent the scratch damage in the course of a MEMS process. A manufacturing method for the MEMS chip is also provided.

    Method for producing a mems device including a vapour release step
    100.
    发明公开
    Method for producing a mems device including a vapour release step 审中-公开
    Verfahren zur Herstellung einer MEMS-Vorrichtung mit Dampffreisetzungsschritt

    公开(公告)号：EP2682363A1

    公开(公告)日：2014-01-08

    申请号：EP12175390.9

    申请日：2012-07-06

    Applicant: IMEC ,  NXP B.V.

    Inventor： Boccardi, Guillaume ,  Du Bois, Bert

    IPC: B81C1/00

    CPC classification number: B81C1/00476 ,  B81B2201/0257 ,  B81C1/00595 ,  B81C2201/0132 ,  B81C2201/0142 ,  B81C2201/0177 ,  B81C2201/053

    Abstract: The present invention is related to a method for producing a Micro-Electromechanical System (MEMS) device, comprising:
    - Depositing a sacrificial oxide layer on a substrate,
    - Depositing one or more structural layers on said sacrificial oxide layer and patterning said structural layers to form a structure,
    - Removing the sacrificial layer by vapour etching,
    to thereby release a portion of said structure,

    wherein the step of depositing a sacrificial oxide layer comprises depositing a first layer (7) of a first sacrificial oxide having a first density, and depositing on said first layer a second layer (8) of a second sacrificial oxide, the second layer having a higher density than the first layer. The method allows to protect a first structural layer deposited on and in contact with the second sacrificial oxide layer, said vapour etching step having low selectivity of said first structural layer towards said first sacrificial oxide layer. Said first structural layer may be a silicon nitride layer protecting the backplate of a MEMS microphone.

    Abstract translation: 本发明涉及一种用于制造微机电系统（MEMS）器件的方法，包括： - 在衬底上沉积牺牲氧化物层， - 在所述牺牲氧化物层上沉积一个或多个结构层，并将所述结构层图案化 形成结构， - 通过蒸汽蚀刻去除牺牲层，从而释放所述结构的一部分，其中沉积牺牲氧化物层的步骤包括沉积具有第一密度的第一牺牲氧化物的第一层（7），以及 在所述第一层上沉积第二牺牲氧化物的第二层（8），所述第二层具有比所述第一层更高的密度。 该方法允许保护沉积在第二牺牲氧化物层上并与第二牺牲氧化物层接触的第一结构层，所述蒸气蚀刻步骤具有所述第一结构层朝向所述第一牺牲氧化物层的低选择性。 所述第一结构层可以是保护MEMS麦克风的背板的氮化硅层。

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