Abstract:
The present invention has for its object to provide a process for manufacturing multilayer printed circuit boards which is capable of simultaneous via hole filling and formation of conductor circuit and via holes of good crystallinity and uniform deposition can be constructed on a substrate and high-density wiring and highly reliable conductor connections can be realized without annealing.The present invention is related to a process for manufacturing multilayer printed circuit boards which comprises disposing an interlayer resin insulating layer on a substrate formed with a conductor circuit, creating openings for formation of via holes in said interlayer resin insulating layer, forming an electroless plated metal layer on said interlayer resin insulating layer, disposing a resist thereon, performing electroplating, stripping the resist off and etching the electroless plated metal layer to provide a conductor circuit and via holes, wherein the electroplating is performed intermittently using said electroless plated metal layer as cathode and a plating metal as anode at a constant voltage between said anode and said cathode.
Abstract:
A process is revealed whereby resistors can be manufactured integral with a printed circuit board by plating the resistors onto the insulative substrate. Uniformization of the insulative substrate through etching and oxidation of the plated resistor are discussed as techniques for improving the uniformity and consistency of the plated resistors. Trimming and baking are also disclosed as methods for adjusting and stabilizing the resistance of the plated resistors.
Abstract:
A circuitized semiconductor substrate comprising a layer of dielectric material having holes therethrough, a catalyst seed layer lining the walls of the holes along the surface of the dielectric material, and a nickel layer in the openings and a layer of copper above the nickel layer, along with a method for its fabrication. The invention also provides copper-nickel laminate PTH barrels and methods for their fabrication.
Abstract:
A laminate for use as a surface laminate in a multi-layer printed circuit board. The laminate is comprised of a film substrate formed of a first polymeric material. At least one layer of a flash metal is applied to a first side of the film substrate. At least one layer of copper is disposed on the layer of flash metal. An adhesive layer formed of a second polymeric material has a first surface that is attached to a second side of the film substrate.
Abstract:
A method is disclosed for forming resistors that are low cost, easy to manufacture and substantially within 5 percent of their desired value. In one aspect of the method, an electrically resistive material, such as nickel, is deposited directly on an insulating layer, such as a substrate. A conductive material, such as copper, is then deposited on the resistive material. Using photo-imaging, signal traces are formed in the conductive and resistive materials. A resistor is created by forming a gap in the conductive material at a location where the resistor is desired. Current is thereby forced to flow through the resistive material at the location of the gap.
Abstract:
Polyimide-metal laminates are formed by etching the surfaces of a polyimide web with a glycol-containing etchant followed by electroless nickel or cobalt deposition and then by copper per deposition. The glycol containing etchant can be utilized to form through holes through the web.
Abstract:
A method of manufacturing a copper-polyimide substrate, includes hydrophilicating the surface(s) of a polyimide film, applying a catalyst thereto, subjecting the film to electroless plating, heat-treating it in an inert atmosphere, and subjecting it to electroless copper plating or to electroless copper plating followed by electrolytic copper plating. The hydrophilication of the surface(s) of the polyimide film is effected with an aqueous solution containing a hydrazine hydrate and an alkali metal hydroxide or with an aqueous solution containing a permanganate and/or a hypochlorite, then a catalyst is applied to the surface(s) by an ordinary way, then the surface(s) is/are subjected to electroless plating with any one of nickel, cobalt nickel alloys or cobalt alloys to form a plated layer thereon having a thickness of from 0.01 to 0.1 .mu.m and having an impurity content of 10% by weight or less, and thereafter the resulting substrate is heat-treated in an inert atmosphere under the condition that the highest temperature that the substrate reaches falls within the range of from 350.degree. to 540.degree. C. and that the thermal load coefficient( D) to be obtained by the following numerical expression (1) falls within the range of from 0.3 to 3.5. ##EQU1## where ti indicates a desired time; and Ti indicates the temperature of the substrate itself at that time.
Abstract:
Bath surfaces of a polyimide sheet are coated with a layer of electroless nickel or cobalt which can also include a thin electroless copper layer on the Ni. or Co. This tenaciously bonded coating is subsequently treated in such a way so as to increase its permeability or porosity without substantially altering its resistive properties. The induced porosity allows water and other volatiles trapped in the dielectric polyimide sheet to be removed while the preserved electrical continuity of the metal layer is sufficient to support electrolytic copper plating which services the dual purpose of providing a copper thickness useful for the subsequent production of electronic circuitry and preventing the readsorption of water into the dielectric core by permanently sealing or coating said porous metal layer.
Abstract:
Both surfaces of a uniformly and completely textured polyimide sheet are coated with a layer of electroless nickel or cobalt and a subsequent layer of electrolytically applied copper yielding an adhesiveless laminate useful in the production of electronic circuitry. The copper and nickel or cobalt layers are strongly bonded to the textured polyimide sheet to the extent that the laminate exceeds bond strength requirements as measured by current standard peel strength tests of the Institute for Interconnecting and Packaging Electronic Circuits (IPC) for both initial and post solder float adhesion, as well as a modification of IPC test 2.4.9 method E for resistance to thermal cycling.
Abstract:
A multilayer structure comprising alternating metal and dielectric layers and having intralayer junctions for interconnecting the metal layers. The intralayer junctions are made integral with end faces of the metal layers.