公开(公告)号：KR1020090098077A

公开(公告)日：2009-09-17

申请号：KR1020080023254

申请日：2008-03-13

Applicant: 에스케이하이닉스 주식회사

Inventor： 박정현

IPC: H05K1/11

CPC classification number: H05K1/115 ,  H05K3/4038 ,  H05K2201/095

Abstract: A circuit board is provided to reduce electromagnetic interference and the distortion of a first signal by forming a return current path in a second penetration electrode. A board body(10) has a first side, a second side and a via hole. The via hole passes through the first side and the second side. A dual via structure(20) has a first penetration electrode and a second penetration electrode. The first and second penetration electrodes are arranged in an inner side of the board body formed by the via hole. The first and second penetration electrodes are electrically insulated. A first wiring(30) is electrically connected to the first penetration electrode. A second wiring(40) is electrically connected to the second penetration electrode. A first signal is applied to the first wiring. A second signal is applied to the second wiring. The first signal is a data signal. The second signal is a ground signal.

Abstract translation: 提供电路板以通过在第二穿透电极中形成返回电流路径来减少电磁干扰和第一信号的失真。 板体（10）具有第一侧，第二侧和通孔。 通孔穿过第一侧和第二侧。 双通道结构（20）具有第一穿透电极和第二穿透电极。 第一和第二穿透电极布置在由通孔形成的板体的内侧。 第一和第二穿透电极是电绝缘的。 第一布线（30）电连接到第一穿透电极。 第二布线（40）电连接到第二穿透电极。 第一信号被施加到第一布线。 第二信号被施加到第二布线。 第一信号是数据信号。 第二个信号是接地信号。

公开(公告)号：US20240313525A1

公开(公告)日：2024-09-19

申请号：US18198137

申请日：2023-05-16

Applicant: CABLE VISION ELECTRONICS CO., LTD.

Inventor： Chien-Chung LEE ,  Min-Chi TSENG ,  Cheng-Wei PENG ,  Yu-An CHEN

IPC: H02H9/04 ,  H05K1/16

CPC classification number: H02H9/044 ,  H05K1/165 ,  H05K1/167 ,  H05K2201/095 ,  H05K2201/10666

Abstract: An electronic apparatus includes a printed circuit board, a terminal and a surge voltage protection structure. The printed circuit board includes a first plated through hole, a second plated through hole and a ground terminal. The surge voltage protection structure includes the first plated through hole and the second plated through hole. The first plated through hole is electrically connected to the terminal. The second plated through hole is connected to the ground terminal. A gap is defined between the first plated through hole and the second plated through hole. The first plated through hole receives a surge voltage to generate an electric arc across the gap and transmit the electric arc through the gap to the second plated through hole, so that the second plated through hole receives the electric arc to transfer an energy of the electric arc to the ground terminal.

公开(公告)号：US20240304534A1

公开(公告)日：2024-09-12

申请号：US18594573

申请日：2024-03-04

Applicant: MEDIATEK INC.

Inventor： Shu-Wei HSIAO ,  Chung-Fa LEE

IPC: H01L23/498 ,  H01L23/00 ,  H05K1/11 ,  H05K3/46

CPC classification number: H01L23/49822 ,  H01L24/32 ,  H05K1/112 ,  H05K3/4644 ,  H01L2224/32225 ,  H01L2924/1207 ,  H05K2201/095

Abstract: A substrate structure and a package assembly with the substrate structure are provided. The substrate structure includes a first trace, a second trace, a first through-hole via (THV), a second THV formed in a build-up layer and a bridge trace. The first trace includes a first pad portion and a second pad portion separated from the first pad portion and arranged near a corner of the first pad portion. The first THV passes through the first pad portion and the second THV passes through the second pad portion. The first bridge trace formed in the substrate structure and thermally connected to the second THV and the first THV.

公开(公告)号：US20240262738A1

公开(公告)日：2024-08-08

申请号：US18638458

申请日：2024-04-17

Applicant: Schott Japan Corporation

Inventor： Yutaka ONEZAWA ,  Akira OKUNO ,  Kazuhito MIYAWAKI

IPC: C03C4/00 ,  H01L23/06 ,  H01L23/08 ,  H01L23/15 ,  H01L23/28 ,  H01L23/498 ,  H05K1/11

CPC classification number: C03C4/0007 ,  H01L23/15 ,  H01L23/49827 ,  H05K1/113 ,  H01L23/06 ,  H01L23/08 ,  H01L23/28 ,  H05K2201/0162 ,  H05K2201/095

Abstract: A biocompatible glass substrate with through electrodes includes a glass plate of a biocompatible glass, and through electrodes made of a biocompatible metal that are provided by penetrating the glass plate. A biocompatible electronic device using this is the biocompatible electronic device including a biocompatible glass substrate with through electrode having a glass plate of a biocompatible glass, and through electrodes made of a biocompatible metal provided by penetrating the glass plate, and an electric/electronic device sealed onto the above described glass plate and is electrically connected to the above described through electrodes, and has bumps for connection on the through electrodes of the biocompatible electronic device.

公开(公告)号：US20230422405A1

公开(公告)日：2023-12-28

申请号：US18318267

申请日：2023-05-16

Applicant: SUPERC-TOUCH CORPORATION

Inventor： Hsiang-Yu LEE ,  Shang CHIN ,  Ping-Tsun LIN

IPC: H05K3/32 ,  H05K1/02

CPC classification number: H05K3/323 ,  H05K1/0278 ,  H05K1/028 ,  H05K2201/023 ,  H05K2201/0335 ,  H05K2201/095 ,  H05K2203/068

Abstract: A circuit structure for hot-press bonding includes a first substrate, a second substrate and a conductive adhesive layer. The circuit structure further includes a first conductive layer having a plurality of connection electrodes arranged on the first substrate, a second conductive layer including a plurality of backup electrodes respectively corresponding to the connection electrodes, an insulating layer arranged between the first conductive layer and the second conductive layer, and a plurality of conductive via arranged in the insulating layer and connected to corresponding connection electrodes and backup electrodes to provide current conduction paths therebetween, thus provide additional conduction path for the connection electrodes even the connection electrodes have fracture and enhance yield and connection reliability.

公开(公告)号：US11777354B2

公开(公告)日：2023-10-03

申请号：US16934416

申请日：2020-07-21

Applicant: Infinitum Electric, Inc.

Inventor： Paulo Guedes-Pinto ,  Ben Schuler

IPC: H02K3/26 ,  H02K9/22 ,  H05K1/16 ,  H02K1/12 ,  H02K21/24 ,  H02K11/26 ,  H02K11/30 ,  H01F17/00 ,  H01F27/22 ,  H01F27/28 ,  H02K1/18 ,  H05K1/02 ,  H05K1/11

CPC classification number: H02K3/26 ,  H01F17/0013 ,  H01F27/22 ,  H01F27/2804 ,  H02K1/12 ,  H02K1/182 ,  H02K9/22 ,  H02K11/26 ,  H02K11/30 ,  H02K21/24 ,  H05K1/0201 ,  H05K1/0218 ,  H05K1/0298 ,  H05K1/115 ,  H05K1/165 ,  H01F2017/002 ,  H01F2017/0053 ,  H01F2027/2809 ,  H02K2203/03 ,  H02K2211/03 ,  H05K2201/093 ,  H05K2201/095 ,  H05K2201/10416

Abstract: An axial field rotary energy device can include rotors having magnets and an axis of rotation. A stator assembly can be located axially between the rotors. The stator assembly can include PCB panels. Each PCB panel can have layers. Each layer can include coils. Each coil can have radial traces relative to the axis. The radial traces can include non-linear radial traces coupled by arch traces that are transverse to the non-linear radial traces.

公开(公告)号：US20190196985A1

公开(公告)日：2019-06-27

申请号：US16288891

申请日：2019-02-28

Applicant: MORGAN / WEISS TECHNOLOGIES INC.

Inventor： Morgan Johnson ,  Frederick G. Weiss

IPC: G06F13/16 ,  G11C5/04 ,  G06F1/32 ,  H05K1/02 ,  H01L23/32 ,  H05K1/11 ,  H05K1/14 ,  H05K1/18 ,  H01L23/498 ,  G06F13/40

CPC classification number: G06F13/16 ,  G06F1/32 ,  G06F13/4068 ,  G11C5/04 ,  H01L23/32 ,  H01L23/49838 ,  H01L23/4985 ,  H01L2924/0002 ,  H05K1/0237 ,  H05K1/0243 ,  H05K1/0296 ,  H05K1/111 ,  H05K1/115 ,  H05K1/141 ,  H05K1/147 ,  H05K1/181 ,  H05K1/189 ,  H05K7/00 ,  H05K2201/095 ,  H05K2201/10159 ,  H05K2201/10189 ,  H05K2201/10378 ,  H05K2201/10515 ,  H05K2201/10522 ,  Y02D10/151 ,  Y10T29/4913 ,  H01L2924/00

Abstract: An apparatus includes a processor having an array of processor interconnects arranged to connect the processor to conductive paths, a circuit substrate having an array of circuit interconnects arranged to provide connections between the processor and the circuit substrate, the circuit substrate having conductive paths connected to the array of circuit interconnects, an interposer substrate arranged between the processor and the circuit substrate, at least one conductive trace in the interposer substrate in connection with at least one processor interconnect in the array of interconnects on the processor, the conductive trace arranged at least partially parallel to the interposer substrate such that no electrical connection exists between the conductive trace in the interposer substrate and a corresponding one of the circuit interconnects on the circuit substrate, andat least one peripheral circuit connected to the at least one conductive trace.

公开(公告)号：US20180200992A1

公开(公告)日：2018-07-19

申请号：US15693001

申请日：2017-08-31

Applicant: ISOLA USA CORP.

Inventor： Roland Schönholz

IPC: B32B15/08 ,  B32B15/20 ,  B32B15/14 ,  B32B5/26 ,  B32B5/02 ,  H05K3/46

CPC classification number: B32B15/08 ,  B32B5/024 ,  B32B5/26 ,  B32B15/14 ,  B32B15/20 ,  B32B37/0076 ,  B32B37/02 ,  B32B37/144 ,  B32B37/26 ,  B32B37/30 ,  B32B38/10 ,  B32B2260/023 ,  B32B2260/046 ,  B32B2262/101 ,  B32B2305/076 ,  B32B2305/72 ,  B32B2305/74 ,  B32B2305/77 ,  B32B2307/41 ,  B32B2307/412 ,  B32B2310/0831 ,  B32B2457/08 ,  H05K1/0278 ,  H05K1/028 ,  H05K1/118 ,  H05K1/147 ,  H05K3/429 ,  H05K3/4691 ,  H05K2201/0195 ,  H05K2201/09063 ,  H05K2201/09081 ,  H05K2201/095 ,  Y10T428/24314 ,  Y10T428/24322 ,  Y10T428/24331 ,  Y10T428/24612 ,  Y10T428/24802 ,  Y10T428/24851 ,  Y10T428/2486

Abstract: Prepregs having a UV curable resin layer located adjacent to a thermally curable resin layer wherein the UV curable resin layer includes at least one UV cured resin portion and at least one UV uncured resin as well as methods for preparing flexible printed circuit boards using the prepregs.

公开(公告)号：US20180199437A1

公开(公告)日：2018-07-12

申请号：US15737677

申请日：2016-06-15

Applicant: LG INNOTEK CO., LTD.

Inventor： Dong Woo KIM

IPC: H05K1/11 ,  H05K1/02 ,  H03H7/38

CPC classification number: H05K1/113 ,  H03H7/38 ,  H05K1/0251 ,  H05K1/0298 ,  H05K3/0052 ,  H05K3/403 ,  H05K3/429 ,  H05K2201/095 ,  H05K2201/10098

Abstract: A surface mounting component module according to one embodiment of the present invention comprises: a multi-layer substrate; a side via formed by penetrating the multi-layer substrate, and electrically connecting the multi-layer substrate; a side via pad positioned on at least one layer of the multi-layer substrate, and formed in the vicinity of the side via; and an RF pattern connected to the side via pad by a signal line, wherein all of the RF pattern, the side via, and the side via pad are electrically connected.

公开(公告)号：US20180049309A1

公开(公告)日：2018-02-15

申请号：US15793524

申请日：2017-10-25

Applicant: Intel Corporation

Inventor： Adel A. Elsherbini ,  Aleksandar Aleksov ,  Shawna Liff

IPC: H05K1/02 ,  H05K1/11 ,  H05K3/22 ,  H05K3/46 ,  H05K3/30 ,  H05K1/18 ,  H05K3/28 ,  H05K1/03

CPC classification number: H05K1/028 ,  H05K1/0283 ,  H05K1/0393 ,  H05K1/115 ,  H05K1/118 ,  H05K1/181 ,  H05K3/22 ,  H05K3/284 ,  H05K3/301 ,  H05K3/4691 ,  H05K2201/05 ,  H05K2201/057 ,  H05K2201/09263 ,  H05K2201/095 ,  H05K2203/1316

Abstract: Some forms relate to a stretchable computing device that includes a stretchable body; a first electronic component embedded within the stretchable body; a second electronic component embedded within the stretchable body; and wherein the first electronic component and the second electronic component are connected by stretchable electrical connectors that include vias. The stretchable electrical connectors are non-planar and/or may have a partial zig-zag shape and/or a partial coil shape. In some forms, the stretchable computing device further includes a textile attached to the stretchable body.