公开(公告)号：WO2017162889A1

公开(公告)日：2017-09-28

申请号：PCT/EP2017/057180

申请日：2017-03-27

Applicant: ROBERT BOSCH GMBH

Inventor： SAMARAO, Ashwin ,  YEE, Seow Yuen ,  YAMA, Gary

IPC: B81C1/00

CPC classification number: B81B7/0058 ,  B81B2201/0207 ,  B81B2201/0214 ,  B81B2201/0235 ,  B81B2201/0257 ,  B81B2201/0278 ,  B81B2201/0292 ,  B81B2201/047 ,  B81C1/00206 ,  B81C1/0038 ,  B81C2201/0176 ,  B81C2201/0181 ,  C23C16/22 ,  C23C16/45527

Abstract: System and method for forming an ALD assembly on a surface of a microelectromechanical system (MEMS) device comprises a substrate having a surface and the ALD assembly is at least partially disposed on the surface of the substrate, wherein the ALD assembly is at least one of hydrophobic and hydrophilic properties. The ALD layer further includes a first ALD and a second ALD. On the surface of the substrate, the first ALD is deposited in a first deposition cycle and the second ALD is deposited in a second deposition cycle. The ALD assembly further comprises a seed layer formed using atomic layer deposition and the ALD layer is at least partially disposed on the seed layer. In one example, the seed layer is formed from alumina (Al 2 O 3 ) and the ALD layer is formed from platinum (Pt). In alternate embodiment, on the seed layer, the first ALD is deposited in a first deposition cycle and the second ALD is deposited in a subsequent deposition cycle. The substrate is formed from silicon dioxide (SiO 2 ).

Abstract translation: 用于在微机电系统（MEMS）器件的表面上形成ALD组件的系统和方法包括具有表面的衬底，并且ALD组件至少部分地设置在衬底的表面上，其中 ALD组件是疏水性和亲水性中的至少一种。 ALD层还包括第一ALD和第二ALD。 在衬底的表面上，在第一沉积循环中沉积第一ALD，并且在第二沉积循环中沉积第二ALD。 ALD组件还包括使用原子层沉积形成的种子层，并且ALD层至少部分地设置在种子层上。 在一个实例中，籽晶层由氧化铝（Al 2 O 3：3）形成并且ALD层由铂（Pt）形成。 在替代实施例中，在种子层上，第一ALD在第一沉积循环中沉积并且第二ALD在随后的沉积循环中沉积。 衬底由二氧化硅（SiO 2）形成。

公开(公告)号：WO2016005464A1

公开(公告)日：2016-01-14

申请号：PCT/EP2015/065629

申请日：2015-07-08

Applicant: FRAUNHOFER-GESELLSCHAFT ZUR FÖRDERUNG DER ANGEWANDTEN FORSCHUNG E.V.

Inventor： GOEHLICH, Andreas ,  JUPE, Andreas ,  VOGT, Holger

IPC: H01L21/768 ,  H01L23/482 ,  H01L21/3205 ,  H01L23/525 ,  H01L23/00 ,  B81B3/00 ,  B81B7/00

CPC classification number: B81C1/00619 ,  B81B7/0003 ,  B81B2201/0207 ,  B81B2201/0214 ,  B81B2201/042 ,  B81C1/0019 ,  B81C2201/0187 ,  H01L23/4821 ,  H01L23/5256

Abstract: Es wird ein Verfahren zur Herstellung einer Vorrichtung mit Bereitstellen eines Substrats mit einer Elektrode beschrieben, die an einer Hauptseite des Substrats freiliegt. Ferner umfasst das Verfahren das Bilden einer Mikro- oder Nanostruktur, die einen Abstandshalter aufweist, der auf der Elektrode fußt, wobei das Bilden folgende Schritte aufweist: Abscheiden einer Opferschicht auf der Hauptseite, wobei die Opferschicht amorphes Silizium (a-Si) oder Siliziumdioxid (SiO 2 ) enthält; Strukturieren eines Loches und/oder Grabens in die Opferschicht mittels eines DRiE-Prozesses; Beschichten der Opferschicht mittels ALD oder MOCVD, so dass sich Material der Nano- oder Mikrostruktur an dem Loch und/oder Graben bildet sowie Entfernen der Opferschicht.

Abstract translation: 它是用一个电极，用于制造装置具有提供在所述基板的一个主面露出的衬底的方法进行说明。 此外，该方法包括形成微结构或纳米结构，其中有一个隔离件，它是基于在电极上，其中，所述形成步骤包括：在主侧上，其中所述牺牲层是无定形硅（a-Si）或氧化硅（沉积牺牲层 二氧化硅）包含; 图案化在使用DRIE工艺的牺牲层中的孔和/或沟槽; 涂覆使用ALD或MOCVD，以形成在孔和/或沟槽中的纳米或微米结构的材料的牺牲层以及去除牺牲层。

公开(公告)号：WO2014031200A1

公开(公告)日：2014-02-27

申请号：PCT/US2013/042649

申请日：2013-05-24

Applicant: RAYTHEON COMPANY

Inventor： GOOCH, Roland, W. ,  DIEP, Buu, Q. ,  BLACK, Stephen, H. ,  KOCIAN, Thomas, A. ,  KENNEDY, Adam, M.

IPC: B81C1/00 ,  B81B7/00

CPC classification number: B81C1/00325 ,  B05D5/061 ,  B81B7/0067 ,  B81B2201/0207 ,  B81C2203/0118

Abstract: Methods for reducing wafer bow induced by an anti -reflective coating of a cap wafer are provided. The method may utilize a shadow mask having at least one opening therein that is positioned opposite recessed regions in a cap wafer. The method may further include depositing at least one layer of an anti-reflective coating material through the shadow mask onto a planar side of a cap wafer to provide a discontinuous coating on the planar side.

Abstract translation: 提供了通过盖晶片的防反射涂层引起的减少晶片弓的方法。 该方法可以利用其中具有至少一个开口的荫罩，其位于帽晶片中的相对凹陷区域。 该方法还可以包括将至少一层抗反射涂层材料通过荫罩沉积到盖晶片的平面侧上，以在平面侧上提供不连续的涂层。

公开(公告)号：WO2013134592A3

公开(公告)日：2013-10-31

申请号：PCT/US2013029763

申请日：2013-03-08

Applicant: BOSCH GMBH ROBERT ,  YAMA GARY ,  PURKL FABIAN ,  LIGER MATTHIEU ,  ILLING MATTHIAS

Inventor： YAMA GARY ,  PURKL FABIAN ,  LIGER MATTHIEU ,  ILLING MATTHIAS

IPC: B81C1/00 ,  B81B3/00 ,  G01J5/02 ,  G01J5/20 ,  H01L27/146

CPC classification number: B81C1/00039 ,  B81B3/007 ,  B81B2201/0207 ,  B81B2203/0307 ,  B81C2201/0181 ,  G01J5/023 ,  H01L27/14649 ,  H01L27/14683

Abstract: In one embodiment, a method of forming a semiconductor device includes providing a substrate, forming a sacrificial layer above the substrate layer, forming a first trench in the sacrificial layer, forming a first sidewall layer with a thickness of less than about 50 nm on a first sidewall of the first trench using atomic layer deposition (ALD), and removing the sacrificial layer.

Abstract translation: 在一个实施例中，一种形成半导体器件的方法包括提供衬底，在衬底层上方形成牺牲层，在牺牲层中形成第一沟槽，在衬底上形成厚度小于约50nm的第一侧壁层 使用原子层沉积（ALD）形成第一沟槽的第一侧壁，并去除牺牲层。

公开(公告)号：WO2013134592A2

公开(公告)日：2013-09-12

申请号：PCT/US2013/029763

申请日：2013-03-08

Applicant: ROBERT BOSCH GMBH ,  YAMA, Gary ,  PURKL, Fabian ,  LIGER, Matthieu ,  ILLING, Matthias

Inventor： YAMA, Gary ,  PURKL, Fabian ,  LIGER, Matthieu ,  ILLING, Matthias

IPC: B81C1/00

CPC classification number: B81C1/00039 ,  B81B3/007 ,  B81B2201/0207 ,  B81B2203/0307 ,  B81C2201/0181 ,  G01J5/023 ,  H01L27/14649 ,  H01L27/14683

Abstract: In one embodiment, a method of forming a semiconductor device includes providing a substrate, forming a sacrificial layer above the substrate layer, forming a first trench in the sacrificial layer, forming a first sidewall layer with a thickness of less than about 50 nm on a first sidewall of the first trench using atomic layer deposition (ALD), and removing the sacrificial layer.

Abstract translation: 在一个实施例中，形成半导体器件的方法包括提供衬底，在衬底层上形成牺牲层，在牺牲层中形成第一沟槽，形成厚度小于约50nm的第一侧壁层 使用原子层沉积（ALD）的第一沟槽的第一侧壁，以及去除牺牲层。

公开(公告)号：WO2013070013A1

公开(公告)日：2013-05-16

申请号：PCT/KR2012/009447

申请日：2012-11-09

Applicant: 주식회사 유우일렉트로닉스

Inventor： 한용희 ,  김형원 ,  안미숙

IPC: B81C1/00 ,  B81B7/02 ,  G01P15/00 ,  H01L21/48

CPC classification number: B81B7/0038 ,  B81B7/007 ,  B81B2201/0207 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2207/096 ,  B81C1/00269 ,  B81C1/00285 ,  B81C2203/0118 ,  G01P15/0802 ,  H01L31/02016 ,  H01L2224/291 ,  H01L2924/014

Abstract: 본 발명에 따른 MEMS 센서 패키징은, ROIC 회로가 형성된 제 1 웨이퍼와; 상기 제 1 웨이퍼와 대응하도록 배치되고, 일면에 오목부가 형성되어 MEMS 센서가 마련된 제 2 웨이퍼와; 상기 제 1 웨이퍼와 상기 제 2 웨이퍼를 접합하여 상기 MEMS 센서가 밀봉되도록 상기 MEMS 센서의 주위를 따라 형성된 접합 솔더와; 상기 제 1 웨이퍼의 ROIC 회로와 상기 제 2 웨이퍼의 MEMS 센서가 전기적으로 연결되도록 형성된 패드 솔더를 포함하는 점에 그 특징이 있다. 본 발명에 따르면, ROIC 회로가 형성된 웨이퍼와 MEMS 센서가 형성된 웨이퍼를 접합하여 패키징하는데 있어서, ROIC 회로와 MEMS 센서를 전기적으로 연결하기 위한 패드 솔더를 내부에 형성함으로써 패키지의 크기를 줄이고, 안정적으로 전기적 신호를 공급할 수 있다.

Abstract translation: 本发明涉及一种MEMS传感器封装及其方法。 MEMS传感器封装包括：设置在ROIC电路上的第一晶片; 设置成对应于第一晶片并且在其一个表面中具有凹部以提供MEMS传感器的第二晶片; 设置在MEMS传感器周围的接合焊料，以将第一和第二晶片彼此结合，从而密封MEMS传感器; 以及将第一晶片的ROIC电路电连接到第二晶片的MEMS传感器的焊盘。 根据本发明，当配置有ROIC电路的晶片和其上设置MEMS传感器的晶片被接合以封装接合的晶片时，可以提供用于将ROIC传感器电连接到MEMS传感器的焊盘 在封装内减小封装的尺寸并稳定地提供电信号。

公开(公告)号：US20240043264A1

公开(公告)日：2024-02-08

申请号：US18266514

申请日：2021-12-09

Applicant: Obsidian Sensors, Inc.

Inventor： Tallis CHANG ,  Sean ANDREWS

IPC: B81B7/00 ,  B81C3/00

CPC classification number: B81B7/0006 ,  B81C3/001 ,  B81B2201/0207 ,  B81B2207/07 ,  B81C2203/035

Abstract: Some embodiments include methods of manufacturing a plurality of MEMS devices, each device including a first material and a second material with different CTE. The method includes providing a carrier with substantially equal CTE as the first material, the carrier comprising a plurality of cavities. The method also includes positioning a plurality of components in respective cavities of the carrier, the components comprising the second material. In some embodiments, the method includes positioning a layer of the first material on the second material components. In some embodiments, the method includes bonding the first material layer and the second material components. The method also includes removing the carrier and singulating the first material layer to produce the plurality of MEMS devices.

公开(公告)号：US11845653B2

公开(公告)日：2023-12-19

申请号：US17440175

申请日：2020-04-01

Applicant: Meridian Innovation Pte Ltd

Inventor： Wan Chia Ang ,  Piotr Kropelnicki ,  Ilker Ender Ocak

IPC: B81C1/00

CPC classification number: B81C1/00238 ,  B81B2201/0207 ,  B81B2207/012 ,  B81C2201/0194 ,  B81C2203/0714 ,  B81C2203/0721 ,  B81C2203/0735 ,  B81C2203/0771 ,  B81C2203/0792

Abstract: A complementary metal oxide semiconductor (CMOS) device integrated with micro-electro-mechanical system (MEMS) components in a MEMS region is disclosed. The MEMS components, for example, are infrared (IR) thermosensors. The MEMS sensors are integrated on the CMOS device heterogeneously. For example, a CMOS wafer with CMOS devices and interconnections as well as partially processed MEMS modules is bonded with a MEMS wafer with MEMS structures, post CMOS compatibility issues are alleviated. Post integration process to complete the devices includes forming contacts for interconnecting the sensors to the CMOS components as well as encapsulating the devices with a cap wafer using wafer-level vacuum packaging.

公开(公告)号：US20180299329A1

公开(公告)日：2018-10-18

申请号：US15485942

申请日：2017-04-12

Applicant: RAYTHEON COMPANY

Inventor： Paolo Masini ,  John William Devitt

IPC: G01J5/04 ,  G01J5/22 ,  B81B3/00

CPC classification number: G01J5/046 ,  B81B3/0081 ,  B81B2201/0207 ,  G01J5/0245 ,  G01J5/045 ,  G01J5/06 ,  G01J5/20 ,  G01J5/22 ,  G01J2005/065 ,  H01L31/02164

Abstract: Methods and apparatus for preventing solar damage, and other heat-related damage, to uncooled microbolometer pixels. In certain examples, at least some of the pixels of an uncooled microbolometer are configured with a bimetallic thermal shorting structure that protects the pixel(s) from excessive heat damage. In other examples a thermochroic membrane that becomes highly reflective at temperatures above a certain threshold is applied over the microbolometer pixels to prevent the pixels from being damaged by excessive heat.

公开(公告)号：US20180215610A1

公开(公告)日：2018-08-02

申请号：US15928008

申请日：2018-03-21

Applicant: ULIS

Inventor： Jérôme Favier ,  David Bunel

IPC: B81B7/00 ,  G01J5/20 ,  H01L31/18 ,  H01L23/00 ,  B81C1/00

CPC classification number: B81B7/0038 ,  B81B2201/0207 ,  B81C1/00269 ,  B81C1/00285 ,  B81C2203/0145 ,  B81C2203/019 ,  G01J5/20 ,  H01L23/564 ,  H01L31/186 ,  H01L2224/48091 ,  H01L2924/00014

Abstract: A device having a microelectronic component housed in a hermetically sealed housing having a vacuum inner space, and including a getter that substantially traps only hydrogen, is inert to oxygen and/or to nitrogen, and is housed in said inner space. Each of the constituent parts of the device being likely to degas into the inner space is a mineral material.