公开(公告)号：US20160044780A1

公开(公告)日：2016-02-11

申请号：US14820978

申请日：2015-08-07

Applicant: IBIDEN CO., LTD.

Inventor： Yasushi INAGAKI ,  Kota NODA

IPC: H05K1/02 ,  H05K1/09 ,  H05K3/18 ,  H05K3/20 ,  H05K3/06 ,  H05K3/40 ,  H05K1/11 ,  H05K3/00

CPC classification number: H05K1/111 ,  H05K1/0271 ,  H05K1/0296 ,  H05K1/09 ,  H05K1/115 ,  H05K3/007 ,  H05K3/06 ,  H05K3/061 ,  H05K3/188 ,  H05K3/202 ,  H05K3/205 ,  H05K3/4007 ,  H05K3/4069 ,  H05K2201/0302 ,  H05K2201/0341 ,  H05K2201/0367 ,  H05K2201/09563 ,  H05K2201/098 ,  H05K2203/06 ,  Y02P70/611

Abstract: A printed wiring board includes an insulating layer, a first conductor layer embedded into a first surface of the insulating layer and including connecting portions to connect an electronic component, a second conductor layer projecting from a second surface of the insulating layer, a solder resist layer covering the first conductor layer and having an opening structure exposing the connecting portions, a barrier metal layer formed on the connecting portions such that the barrier layer is projecting from the first surface of the insulating layer, and metal posts formed on the barrier layer such that the metal posts are positioned on the connecting portions, respectively. Each metal post has width which is greater than width of a respective connecting portion, and the barrier metal layer includes a metal material which is different from a metal material forming the metal posts and a metal material forming the first conductor layer.

Abstract translation: 印刷布线板包括绝缘层，第一导体层，其嵌入绝缘层的第一表面中，并且包括用于连接电子部件的连接部分，从绝缘层的第二表面突出的第二导体层，阻焊层 覆盖第一导体层并具有露出连接部分的开口结构，形成在连接部分上的阻挡金属层，使得阻挡层从绝缘层的第一表面突出，以及形成在阻挡层上的金属柱，使得 金属柱分别位于连接部分上。 每个金属柱的宽度大于相应连接部分的宽度，并且阻挡金属层包括与形成金属柱的金属材料不同的金属材料和形成第一导体层的金属材料。

公开(公告)号：US20160021758A1

公开(公告)日：2016-01-21

申请号：US14799860

申请日：2015-07-15

Applicant: IBIDEN CO., LTD.

Inventor： Toshiki FURUTANI ,  Yasushi INAGAKI

IPC: H05K3/10 ,  H05K3/40 ,  H05K3/00 ,  H05K1/11

CPC classification number: H05K1/09 ,  H05K1/0271 ,  H05K1/111 ,  H05K1/115 ,  H05K3/0017 ,  H05K3/103 ,  H05K3/205 ,  H05K3/4007 ,  H05K3/4038 ,  H05K2201/0341 ,  H05K2201/094 ,  H05K2203/0384 ,  Y02P70/611

Abstract: A printed wiring board includes an insulation layer, a first conductive layer embedded into first surface of the insulation layer, a second conductive layer formed on second surface of the insulation layer, a via conductor penetrating through the insulation layer and electrically connecting the first and second layers, and a solder-resist layer covering the first layer and having an opening structure forming an exposed structure of the first layer. The exposed structure is formed to connect an electronic component to the first layer, and the first layer has a barrier-metal layer and a metal layer on the first layer such that the barrier-metal layer is on surface of the first layer and includes metal different from metal forming the metal layer and that the metal layer is on surface of the barrier-metal layer in the exposed structure and protruding from the first surface of the insulation layer.

Abstract translation: 印刷布线板包括绝缘层，嵌入绝缘层的第一表面中的第一导电层，形成在绝缘层的第二表面上的第二导电层，穿过绝缘层的通孔导体，并将第一和第二 层，以及覆盖第一层并具有形成第一层的暴露结构的开口结构的阻焊层。 形成暴露结构以将电子部件连接到第一层，并且第一层在第一层上具有阻挡金属层和金属层，使得阻挡金属层在第一层的表面上并且包括金属 与形成金属层的金属不同，并且金属层位于暴露结构中的阻挡金属层的表面上并且从绝缘层的第一表面突出。

公开(公告)号：US09089041B2

公开(公告)日：2015-07-21

申请号：US13742681

申请日：2013-01-16

Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

Inventor： Kotaro Kodani ,  Kentaro Kaneko ,  Kazuhiro Kobayashi

IPC: H05K3/02 ,  H05K3/10 ,  H05K3/00 ,  H01L21/48 ,  H01L23/498 ,  H05K1/11 ,  H05K3/46 ,  H05K3/20

CPC classification number: H05K3/10 ,  H01L21/4846 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/15174 ,  H05K1/113 ,  H05K3/00 ,  H05K3/205 ,  H05K3/4682 ,  H05K2201/0338 ,  H05K2201/0341 ,  H05K2201/09472 ,  H05K2201/10674 ,  H05K2203/0353 ,  H05K2203/0361 ,  H05K2203/0369 ,  H05K2203/0376 ,  H05K2203/1184 ,  Y10T29/49155 ,  H01L2224/0401

Abstract: A wiring board includes an electrode pad having a first surface and a second surface located on an opposite side from the first surface, a conductor pattern connected to the first surface of the electrode pad, and an insulator layer embedded with the electrode pad and the conductor pattern. The insulator layer covers an outer peripheral portion of the second surface of the electrode pad.

Abstract translation: 布线基板包括具有第一表面和位于与第一表面相反一侧的第二表面的电极焊盘，连接到电极焊盘的第一表面的导体图案，以及嵌入电极焊盘和导体的绝缘体层 模式。 绝缘体层覆盖电极焊盘的第二表面的外周部。

公开(公告)号：US20140339699A1

公开(公告)日：2014-11-20

申请号：US14447908

申请日：2014-07-31

Applicant: International Business Machines Corporation

Inventor： Charles L. Arvin ,  Minhua Lu ,  Eric D. Perfecto ,  David J. Russell ,  Wolfgang Sauter ,  Krystyna W. Semkow ,  Thomas A. Wassick

IPC: H01L23/498 ,  H01L21/768

CPC classification number: H01L23/49816 ,  H01L21/76843 ,  H01L21/76885 ,  H01L23/49866 ,  H01L2224/11 ,  H05K1/09 ,  H05K3/3478 ,  H05K3/4007 ,  H05K2201/0338 ,  H05K2201/0341 ,  H05K2201/0344 ,  H05K2201/09745 ,  H05K2203/041

Abstract: An interconnect structure that includes a substrate having an electrical component present therein, and a under-bump metallurgy (UBM) stack that is present in contact with a contact pad to the electrical component that is present in the substrate. The UBM stack includes a metallic adhesion layer that is direct contact with the contact pad to the electrical component, a copper (Cu) seed layer that is in direct contact with the metallic adhesion layer layer, a first nickel (Ni) barrier layer that is present in direct contact with copper (Cu) seed layer, and a layered structure of at least one copper (Cu) conductor layer and at least one second nickel (Ni) barrier layer present on the first nickel (Ni) barrier layer. A solder ball may be present on second nickel (Ni) barrier layer.

Abstract translation: 一种互连结构，其包括其中存在电气部件的基板以及与接触焊盘接触的凸起下冶金（UBM）堆叠，所述凸块冶金（UBM）堆叠存在于所述基板中的所述电气部件。 UBM堆叠包括与接触焊盘直接接触电气部件的金属粘合层，与金属粘附层层直接接触的铜（Cu）种子层，第一镍（Ni）阻挡层， 存在于铜（Cu）种子层的直接接触中，以及存在于第一镍（Ni）阻挡层上的至少一个铜（Cu）导体层和至少一个第二镍（Ni）阻挡层的层状结构。 第二镍（Ni）阻挡层上可能存在焊球。

公开(公告)号：US20140060896A1

公开(公告)日：2014-03-06

申请号：US13827429

申请日：2013-03-14

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Gil Yong SHIN ,  Seung Lak Kim ,  Kyoung Ro Yoon

IPC: H05K1/02

CPC classification number: H05K1/0201 ,  H05K1/09 ,  H05K3/0035 ,  H05K3/4644 ,  H05K2201/0338 ,  H05K2201/0341

Abstract: Disclosed herein is a printed circuit board, including: an insulating layer; a circuit layer formed on one surface of the insulating layer; and a via electrode penetrating through the insulating layer and being connected with the circuit layer, wherein the circuit layer is formed in a structure where different kinds of metal layers having different thermal conductivities are laminated.

Abstract translation: 这里公开了一种印刷电路板，包括：绝缘层; 形成在所述绝缘层的一个表面上的电路层; 以及穿过所述绝缘层并与所述电路层连接的通孔电极，其中所述电路层形成为层叠不同导热系数的不同种类的金属层的结构。

公开(公告)号：US20130134127A1

公开(公告)日：2013-05-30

申请号：US13742681

申请日：2013-01-16

Applicant: Shinko Electric Industries Co., Ltd.

Inventor： Kotaro KODANI ,  Kentaro Kaneko ,  Kazuhiro Kobayashi

IPC: H05K3/00

CPC classification number: H05K3/10 ,  H01L21/4846 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/15174 ,  H05K1/113 ,  H05K3/00 ,  H05K3/205 ,  H05K3/4682 ,  H05K2201/0338 ,  H05K2201/0341 ,  H05K2201/09472 ,  H05K2201/10674 ,  H05K2203/0353 ,  H05K2203/0361 ,  H05K2203/0369 ,  H05K2203/0376 ,  H05K2203/1184 ,  Y10T29/49155 ,  H01L2224/0401

Abstract: A wiring board includes an electrode pad having a first surface and a second surface located on an opposite side from the first surface, a conductor pattern connected to the first surface of the electrode pad, and an insulator layer embedded with the electrode pad and the conductor pattern. The insulator layer covers an outer peripheral portion of the second surface of the electrode pad.

公开(公告)号：US20120328904A1

公开(公告)日：2012-12-27

申请号：US13530936

申请日：2012-06-22

Applicant: Donald M. Baskin ,  John Cahalen ,  Jacob Sylvester

Inventor： Donald M. Baskin ,  John Cahalen ,  Jacob Sylvester

IPC: B32B33/00 ,  C25D7/00 ,  H05K1/09 ,  C25D5/02 ,  C25D15/00 ,  B82Y30/00

CPC classification number: C25D7/123 ,  B82Y30/00 ,  C25D3/48 ,  C25D3/562 ,  C25D5/12 ,  C25D5/18 ,  H05K3/244 ,  H05K2201/0341 ,  H05K2203/0723 ,  Y10T428/12986

Abstract: Printed circuit boards and related articles including electrodeposited coatings are described herein.

Abstract translation: 本文描述了包括电沉积涂层的印刷电路板和相关制品。

公开(公告)号：US08338287B2

公开(公告)日：2012-12-25

申请号：US13030356

申请日：2011-02-18

Applicant: Masayuki Miura ,  Katsuhiko Oyama

Inventor： Masayuki Miura ,  Katsuhiko Oyama

IPC: H01L21/00

CPC classification number: B23K1/0016 ,  B23K35/262 ,  B23K2101/40 ,  H01L21/563 ,  H01L23/49811 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/0401 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/11334 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81024 ,  H01L2224/81191 ,  H01L2224/81411 ,  H01L2224/831 ,  H01L2224/8385 ,  H01L2224/83855 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2924/35121 ,  H01L2924/3651 ,  H05K3/3436 ,  H05K3/3463 ,  H05K2201/0341 ,  H05K2201/10674 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/81805 ,  H01L2924/00012

Abstract: In one embodiment, a preliminary solder layer made of a Sn alloy is formed on a connecting pad of a wiring substrate. A solder bump made of a Sn alloy is formed on an electrode pad of a semiconductor chip. After contacting the preliminary solder layer and the solder bump, the preliminary solder layer and the solder bump are melted by heating to a temperature of their melting points or higher to form a solder connecting part made of a Sn alloy containing Ag and Cu. Only the preliminary solder layer of the preliminary solder layer and the solder bump is composed of a Sn alloy containing Ag.

Abstract translation: 在一个实施例中，在布线基板的连接焊盘上形成由Sn合金制成的预备焊料层。 在半导体芯片的电极焊盘上形成由Sn合金构成的焊料凸块。 在与预焊接层和焊料凸块接触之后，通过加热到预熔焊料层和焊料凸块的熔点以上，形成由含有Ag和Cu的Sn合金构成的焊料连接部。 只有预焊料层和焊料凸块的初步焊料层由含有Ag的Sn合金组成。

公开(公告)号：US20120124830A1

公开(公告)日：2012-05-24

申请号：US13362958

申请日：2012-01-31

Applicant: David C. H. Cheng ,  Shao-Chien Lee ,  Tzyy-Jang Tseng

Inventor： David C. H. Cheng ,  Shao-Chien Lee ,  Tzyy-Jang Tseng

IPC: H05K3/10

CPC classification number: H05K3/4007 ,  H05K3/06 ,  H05K3/062 ,  H05K3/107 ,  H05K3/3452 ,  H05K2201/0341 ,  H05K2201/0367 ,  H05K2201/0376 ,  H05K2201/099 ,  H05K2203/0384 ,  H05K2203/0542 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156

Abstract: A process for fabricating a circuit board is provided. In the process, first, a circuit substrate including an insulation layer and at least a pad contacting the insulation layer is provided. Next, a barrier material layer is formed on the circuit substrate. The barrier material layer completely covers the insulation layer and the pad. Then, at least one conductive bump is formed on the barrier material layer. The conductive bump is opposite to the pad, and the material of the barrier material layer is different from the material of the conductive bump. Next, a portion of the barrier material layer is removed by using the conductive bump as a mask, so as to expose the surface of the insulation layer and to form a barrier connected between the conductive bump and the pad.

Abstract translation: 提供一种制造电路板的工艺。 在该过程中，首先，提供包括绝缘层和至少与绝缘层接触的焊盘的电路基板。 接下来，在电路基板上形成阻挡材料层。 阻挡材料层完全覆盖绝缘层和垫。 然后，在阻挡材料层上形成至少一个导电凸块。 导电凸块与焊盘相对，并且阻挡材料层的材料与导电凸块的材料不同。 接下来，通过使用导电凸块作为掩模来去除阻挡材料层的一部分，以暴露绝缘层的表面并形成连接在导电凸块和焊盘之间的阻挡层。

公开(公告)号：US08101866B2

公开(公告)日：2012-01-24

申请号：US12175348

申请日：2008-07-17

Applicant: Shih-Ping Hsu

Inventor： Shih-Ping Hsu

IPC: H01R9/00

CPC classification number: H05K3/3473 ,  H01L23/498 ,  H01L23/49816 ,  H01L2224/0401 ,  H01L2224/05568 ,  H01L2224/05572 ,  H01L2224/11462 ,  H01L2224/11849 ,  H01L2224/13006 ,  H01L2224/13565 ,  H01L2924/0002 ,  H05K1/0271 ,  H05K3/243 ,  H05K3/3452 ,  H05K3/4007 ,  H05K2201/0341 ,  H05K2201/0367 ,  H05K2201/099 ,  H05K2203/054 ,  H01L2224/05552

Abstract: A packaging substrate with conductive structure is provided, including a substrate body having at least one conductive pad on a surface thereof, a stress buffer metal layer disposed on the conductive pad, a solder resist layer disposed on the substrate body and having at least one opening therein for correspondingly exposing a portion of top surface of the stress buffer metal layer, a metal post disposed on a central portion of the surface of the stress buffer metal layer, and a solder bump covering the surfaces of the metal post. Therefore, a highly reliable conductive structure is provided, by using the stress buffer metal layer to release thermal stresses, and using the metal post and the solder bump to increase the height of the conductive structure.

Abstract translation: 提供一种具有导电结构的封装基板，包括：具有在其表面上至少有一个导电焊盘的基板主体，设置在导电焊盘上的应力缓冲金属层，设置在基板主体上的阻焊层，并具有至少一个开口 用于相应地暴露应力缓冲金属层的顶表面的一部分，设置在应力缓冲金属层的表面的中心部分上的金属柱和覆盖金属柱的表面的焊料凸块。 因此，通过使用应力缓冲金属层来释放热应力，并且使用金属柱和焊料凸块来增加导电结构的高度，提供了高度可靠的导电结构。