公开(公告)号：US20150245501A1

公开(公告)日：2015-08-27

申请号：US14188855

申请日：2014-02-25

Applicant: Avago Technologies General IP (Singapore) Pte. Ltd

Inventor： Nikolaus W. Schunk

IPC: H05K3/36 ,  H01R43/24 ,  H01R43/16

CPC classification number: H05K3/366 ,  H01L2224/48091 ,  H01R12/52 ,  H01R12/707 ,  H01R12/714 ,  H01R12/737 ,  H01R13/405 ,  H01R13/639 ,  H01R43/16 ,  H01R43/24 ,  H05K1/0218 ,  H05K1/117 ,  H05K1/144 ,  H05K1/186 ,  H05K3/3426 ,  H05K3/3447 ,  H05K3/368 ,  H05K2201/043 ,  H05K2201/09618 ,  H05K2201/09709 ,  H05K2201/10121 ,  H05K2201/10189 ,  H05K2201/10757 ,  Y10T29/49126 ,  Y10T29/4922 ,  H01L2924/00014

Abstract: A method for making a leadframe includes removing a group of parallel, strip-shaped electrical conductors from a metal sheet, embedding end portions of the conductors in molding compound defining a leadframe body, and separating the conductors from each other, such that portions of the conductors remain encapsulated in the molding compound while other portions remain exterior to the molding compound and define leads of the resulting leadframe.

Abstract translation: 一种制造引线框架的方法包括从金属板移除一组平行的带状电导体，将导体的端部嵌入限定引线框体的模塑料中，并将导体彼此分离，使得 导体保持封装在模制化合物中，而其它部分保留在模制化合物的外部并限定所得引线框的引线。

公开(公告)号：US08345431B2

公开(公告)日：2013-01-01

申请号：US12317754

申请日：2008-12-29

Applicant: James E. Clayton ,  Zakaryae Fathi

Inventor： James E. Clayton ,  Zakaryae Fathi

IPC: H05K1/00

CPC classification number: H05K1/189 ,  H01L2224/16225 ,  H01L2224/73253 ,  H01L2924/07811 ,  H01L2924/15311 ,  H05K1/147 ,  H05K3/0061 ,  H05K2201/043 ,  H05K2201/056 ,  H05K2201/09109 ,  H05K2201/10159 ,  H05K2201/1056 ,  Y10T29/49124 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49179 ,  H01L2924/00

Abstract: A multichip module comprises a flexible circuit having conductive patterns on its surface(s) to which microelectronic device(s) are attached. The flexible circuit is enclosed and supported by two rigid frames, which may further be provided with protective heat spreading covers. Contact pads on the rigid frame(s) may be configured to engage a mating socket or they may be solderable to a printed circuit board.

公开(公告)号：US08191244B2

公开(公告)日：2012-06-05

申请号：US12878586

申请日：2010-09-09

Applicant: Shang-Lin Sung ,  Shih-Chiehmr Chang ,  Chao-Sheng Chiu ,  Chin-Cheng Lee

Inventor： Shang-Lin Sung ,  Shih-Chiehmr Chang ,  Chao-Sheng Chiu ,  Chin-Cheng Lee

IPC: H05K3/34

CPC classification number: B32B37/02 ,  B32B38/06 ,  B32B2457/08 ,  H05K3/0097 ,  H05K3/427 ,  H05K2201/043 ,  H05K2203/1536 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A fabricating method of a circuit board including the following steps. First, a liquid material is adhered between a first substrate and a second substrate by using an atmospheric pressure difference. Then, a plurality of conductive columns are formed in the first substrate and the second substrate. Next, a patterning process is performed, so as to form two circuit layers. Next, two lamination structures are formed respectively on the circuit layers. Then, the first substrate and the second substrate are separated. Finally, another patterning process is performed, so as to finish the fabrication of the circuit board.

Abstract translation: 一种电路板的制造方法，包括以下步骤。 首先，通过使用大气压力差，将液体材料粘附在第一基板和第二基板之间。 然后，在第一基板和第二基板中形成多个导电柱。 接下来，进行图案化处理，以形成两个电路层。 接下来，在电路层上分别形成两层叠结构。 然后，分离第一基板和第二基板。 最后，进行另一图案化处理，以完成电路板的制造。

公开(公告)号：US20110317383A1

公开(公告)日：2011-12-29

申请号：US12821847

申请日：2010-06-23

Applicant: John S. Guzek

Inventor： John S. Guzek

IPC: H05K1/18 ,  B23P11/00

CPC classification number: H05K1/186 ,  H01L21/561 ,  H01L21/568 ,  H01L23/16 ,  H01L23/3135 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/97 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16235 ,  H01L2224/24227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/3511 ,  H05K3/0097 ,  H05K2201/043 ,  H05K2203/1536 ,  Y10T29/49117 ,  Y10T29/49146 ,  Y10T29/49155 ,  Y10T29/49826 ,  H01L2924/00 ,  H01L2924/00012

Abstract: An apparatus includes a coreless substrate with an embedded die that is integral to the coreless substrate, and at least one device assembled on a surface that is opposite to a ball-grid array disposed on the coreless substrate. The apparatus include an at least one stiffener layer that is integral to the coreless substrate and the stiffener layer is made of overmold material, underfill material, or prepreg material.

Abstract translation: 一种装置包括具有与无芯基板一体的嵌入式管芯的无芯基板，以及组装在与设置在无芯基板上的球栅阵列相对的表面上的至少一个装置。 该装置包括至少一个与无芯基底成一体的加强层，并且加强层由包覆成型材料，底部填充材料或预浸料材料制成。

公开(公告)号：US08085547B2

公开(公告)日：2011-12-27

申请号：US11948526

申请日：2007-11-30

Applicant: Ying-Cheng Wu ,  Kun-Hsiao Liu

Inventor： Ying-Cheng Wu ,  Kun-Hsiao Liu

IPC: H05K1/18

CPC classification number: H05K1/183 ,  H05K1/141 ,  H05K3/284 ,  H05K3/3442 ,  H05K3/4611 ,  H05K3/4697 ,  H05K2201/043 ,  Y10T29/49128 ,  Y10T29/4913

Abstract: An electronic elements carrier includes a body, at least an electronic element and a filler. The body includes a substrate having a plate and a dam formed on the peripheral of plate, a conductive layer mounted on a surface of the dam, and at least a cavity defined by the plate and the dam of the substrate. The electronic element is disposed in the cavity of the body. The filler is received in the cavity of the substrate for encapsulating, sealing and protecting the electronic element.

Abstract translation: 电子元件载体包括主体，至少电子元件和填充物。 主体包括具有板和形成在板的周边上的坝的基板，安装在坝的表面上的导电层和至少由板和基板的坝限定的空腔。 电子元件设置在身体的空腔中。 填料被接收在衬底的空腔中，用于封装，密封和保护电子元件。

公开(公告)号：US07992290B2

公开(公告)日：2011-08-09

申请号：US11940900

申请日：2007-11-15

Applicant: Ying-Lin Chen ,  Yung-Chou Chen

Inventor： Ying-Lin Chen ,  Yung-Chou Chen

IPC: H05K3/36 ,  B32B3/10

CPC classification number: H05K3/427 ,  H05K1/0393 ,  H05K1/181 ,  H05K3/4652 ,  H05K2201/0166 ,  H05K2201/043 ,  H05K2201/09536 ,  H05K2203/0264 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49156 ,  Y10T29/49165 ,  Y10T156/1052 ,  Y10T428/24273

Abstract: An exemplary method of making an FPC includes forming a substrate comprising metal foil layers interleaved with intervening layers by: (a) laminating intervening layers with metal foil layers; (b) adhering a covering film to outermost surfaces of the substrate; (c) defining a hole in one side of the substrate through the covering film and at least two metal foil layers and the intervening layer between the at least two metal foil layers by etching or laser technology; and (d) plating a portion of an inner wall of the hole with conductive material to form a via to electrically connect the at least two metal foil layers.

Abstract translation: 制造FPC的示例性方法包括：通过以下步骤形成包含与中间层交错的金属箔层的基板：（a）将介入层与金属箔层层压; （b）将覆盖膜粘附到基板的最外表面; （c）通过蚀刻或激光技术通过覆盖膜和至少两个金属箔层和至少两个金属箔层之间的中间层来限定衬底的一侧中的孔; 以及（d）用导电材料电镀所述孔的内壁的一部分以形成通孔以电连接所述至少两个金属箔层。

公开(公告)号：US20110031628A1

公开(公告)日：2011-02-10

申请号：US12841495

申请日：2010-07-22

Applicant: Rie TAKADA

Inventor： Rie TAKADA

IPC: H01L23/52 ,  H01L21/50

CPC classification number: H05K1/189 ,  G11C5/04 ,  H01L23/5385 ,  H01L23/5387 ,  H01L25/105 ,  H01L2224/16 ,  H01L2225/06572 ,  H01L2225/06579 ,  H01L2225/1005 ,  H01L2225/1041 ,  H01L2225/107 ,  H01L2924/3511 ,  H05K1/0293 ,  H05K1/0295 ,  H05K1/141 ,  H05K1/144 ,  H05K1/147 ,  H05K3/0052 ,  H05K3/007 ,  H05K3/225 ,  H05K2201/043 ,  H05K2201/055 ,  H05K2201/09127 ,  H05K2201/10159 ,  H05K2201/10545 ,  H05K2201/10734 ,  H05K2203/1572 ,  H05K2203/176

Abstract: A semiconductor device module includes a first substrate layer on which a first semiconductor device is surface-mounted, a second substrate layer that is a layer laminated on a side of the first substrate layer on which the first semiconductor device is not surface-mounted, a second semiconductor device being surface-mounted on a surface of the second substrate layer and not on a side of the first substrate layer, and a hollow section that is a space sandwiched between the first substrate layer and the second substrate layer and formed on back sides of areas on which the first semiconductor device and the second semiconductor device are surface-mounted.

Abstract translation: 半导体器件模块包括第一衬底层，其上表面安装有第一半导体器件，第二衬底层，层叠在第一衬底层的不具有第一半导体器件的表面安装的一侧上的层， 第二半导体器件被表面安装在第二衬底层的表面上而不是在第一衬底层的一侧上，中空部分是夹在第一衬底层和第二衬底层之间并形成在第二衬底层的背面上的空间 的第一半导体器件和第二半导体器件表面安装的区域。

公开(公告)号：US07748110B2

公开(公告)日：2010-07-06

申请号：US11826758

申请日：2007-07-18

Applicant: Toshiyuki Asahi ,  Seiji Karashima ,  Takashi Ichiryu ,  Seiichi Nakatani ,  Tousaku Nishiyama ,  Koichi Hirano ,  Osamu Shibata ,  Takeshi Nakayama ,  Yoshiyuki Saito

Inventor： Toshiyuki Asahi ,  Seiji Karashima ,  Takashi Ichiryu ,  Seiichi Nakatani ,  Tousaku Nishiyama ,  Koichi Hirano ,  Osamu Shibata ,  Takeshi Nakayama ,  Yoshiyuki Saito

IPC: H05K3/36

CPC classification number: H05K3/403 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01R12/52 ,  H01R13/2414 ,  H05K1/0218 ,  H05K1/0284 ,  H05K1/141 ,  H05K1/145 ,  H05K1/182 ,  H05K3/20 ,  H05K3/3442 ,  H05K3/361 ,  H05K3/366 ,  H05K3/368 ,  H05K2201/043 ,  H05K2201/048 ,  H05K2201/049 ,  H05K2201/055 ,  H05K2201/056 ,  H05K2201/09036 ,  H05K2201/10515 ,  H05K2201/10689 ,  H05K2203/302 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49208 ,  H01L2924/00

Abstract: A connection member can be produced without a via-forming step. The connection member includes an insulating substrate which has an upper surface, a lower surface opposed to the upper surface, and a side surface which connects these surfaces; and at least one wiring which extends from the upper surface to the lower surface through the side surface.

Abstract translation: 可以在没有通孔形成步骤的情况下制造连接构件。 连接构件包括绝缘基板，其具有上表面，与上表面相对的下表面和连接这些表面的侧表面; 以及至少一个通过侧面从上表面延伸到下表面的布线。

公开(公告)号：US07688597B2

公开(公告)日：2010-03-30

申请号：US10840051

申请日：2004-05-06

Applicant: Michael Bothe ,  Stefan Morbe ,  Michael Becks ,  Peter Grad

Inventor： Michael Bothe ,  Stefan Morbe ,  Michael Becks ,  Peter Grad

IPC: H05K7/00

CPC classification number: H05K1/144 ,  H01F27/2804 ,  H05K1/0306 ,  H05K1/142 ,  H05K1/162 ,  H05K1/167 ,  H05K1/181 ,  H05K2201/0187 ,  H05K2201/043 ,  H05K2201/1003 ,  H05K2201/10083

Abstract: The present invention relates to a power supply circuit comprising at least one transformer which is connected to a primary side circuit and to a secondary side circuit. The present invention further relates to a method for producing such a power supply circuit. To provide an improved power supply circuit which has a reduced size and increased power density and offers more flexibility in the formation of the safety distances between primary side and secondary side, the primary side circuit and the secondary side circuit are each mounted on at least one separate circuit carrier, said circuit carriers being mechanically and electrically coupled to one another and arranged in at least two different planes. According to advantageous embodiments, said circuit carriers may be arranged in planes that are either parallel with or transverse to one another.

Abstract translation: 本发明涉及一种电源电路，其包括连接到初级侧电路和次级侧电路的至少一个变压器。 本发明还涉及这种电源电路的制造方法。 为了提供一种改进的电源电路，其具有减小的尺寸和增加的功率密度，并且在形成初级侧和次级侧之间的安全距离方面提供更大的灵活性，初级侧电路和次级侧电路分别安装在至少一个 单独的电路载体，所述电路载体彼此机械地和电耦合并且布置在至少两个不同的平面中。 根据有利的实施例，所述电路载体可以布置在彼此平行或相互平行的平面中。

公开(公告)号：US20090173795A1

公开(公告)日：2009-07-09

申请号：US12160541

申请日：2007-02-26

Applicant: Shozo Ochi ,  Osamu Uchida ,  Shigeaki Sakatani ,  Daisuke Sakurai ,  Masato Mori ,  Hiroshi Sakurai ,  Hidenobu Nishikawa

Inventor： Shozo Ochi ,  Osamu Uchida ,  Shigeaki Sakatani ,  Daisuke Sakurai ,  Masato Mori ,  Hiroshi Sakurai ,  Hidenobu Nishikawa

IPC: G06K19/077 ,  H01Q1/38 ,  H01Q7/00 ,  H05K3/00

CPC classification number: H01Q1/22 ,  G06K19/07732 ,  G06K19/07749 ,  H01Q7/06 ,  H05K1/0218 ,  H05K1/144 ,  H05K1/148 ,  H05K1/16 ,  H05K2201/043 ,  H05K2201/086 ,  Y10T29/4913

Abstract: Card type information device includes wiring board having a wiring pattern with an electronic component mounted on a first face of wiring board and an antenna connecting electrode, antenna board having antenna pattern with antenna terminal electrodes formed on a first face of antenna board, magnetic material placed between wiring board and antenna board confronting each other, flexible wiring board for coupling the antenna connecting electrode to antenna terminal electrode, and housing for accommodating wiring board, antenna board, magnetic material, and flexible wiring board. Wiring board and antenna board are made from one and the same insulating motherboard.

Abstract translation: 卡类型信息装置包括具有安装在布线板的第一面上的电子部件和天线连接电极的布线图案的布线板，天线板天线阵列与天线端子电极形成在天线板的第一面上，磁性材料放置 在布线板和天线板之间，用于将天线连接电极耦合到天线端子电极的柔性布线板和用于容纳布线板，天线板，磁性材料和柔性布线板的壳体。 接线板和天线板由同一个绝缘母板制成。