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    CHIP STRUCTURE
    112.
    发明申请
    CHIP STRUCTURE 有权
    芯片结构

    公开(公告)号：US20160340180A1

    公开(公告)日：2016-11-24

    申请号：US14718152

    申请日：2015-05-21

    Applicant: ams International AG

    Inventor： Roel Daamen ,  Hendrik Bouman ,  Kailash Vijayakumar

    IPC: B81C1/00 ,  B81B7/00

    CPC classification number: B81C1/00825 ,  B81B7/0016 ,  B81B2201/0264 ,  B81B2203/0127 ,  B81B2207/015 ,  B81B2207/03 ,  B81C2201/0104 ,  B81C2201/0146 ,  B81C2203/0735 ,  H01L23/642

    Abstract: One example discloses an chip, comprising: a substrate; a first side of a passivation layer coupled to the substrate; a device, having a device height and a cavity, wherein a first device surface is coupled to a second side of the passivation layer which is opposite to the first side of the passivation layer; and a set of structures coupled to the second side of the passivation layer and configured to have a structure height greater than or equal to the device height.

    Abstract translation: 一个实例公开了一种芯片，包括：基板; 耦合到所述衬底的钝化层的第一侧; 具有器件高度和空腔的器件，其中第一器件表面耦合到钝化层的与钝化层的第一侧相对的第二侧; 以及耦合到钝化层的第二侧并且被配置为具有大于或等于器件高度的结构高度的一组结构。

    Method for Manufacturing Hollow Structure
    113.
    发明申请
    Method for Manufacturing Hollow Structure 审中-公开
    空心结构制造方法

    公开(公告)号：US20160280536A1

    公开(公告)日：2016-09-29

    申请号：US14777778

    申请日：2014-03-17

    Applicant: TOKYO ELECTRON LIMITED

    Inventor： Kippei SUGITA ,  Hiroyuki HASHIMOTO

    IPC: B81C1/00

    CPC classification number: B81C1/00047 ,  B81C2201/0104 ,  B81C2201/0108 ,  B81C2201/0132 ,  B82Y40/00

    Abstract: A hollow structure is manufactured by preparing a lower structure which includes a concave portion, depositing a sacrifice film composed of an organic film on the lower structure by a vapor deposition polymerization method to bury the concave portion with the sacrifice film, removing an unnecessary portion of the sacrifice film, forming an upper structure on the sacrifice film with the unnecessary portion removed, and forming an air gap between the lower structure and the upper structure by removing the sacrifice film.

    Abstract translation: 通过制备下部结构制造中空结构，该下部结构包括凹部，通过气相沉积聚合方法在下部结构上沉积由有机膜构成的牺牲膜以用牺牲膜掩埋凹部，除去不需要的部分 牺牲膜，在牺牲膜上形成上部结构，去除不需要的部分，并且通过去除牺牲膜在下部结构和上部结构之间形成气隙。

    Method and Apparatus for Maintaining Parallelism of Layers and/or Achieving Desired Thicknesses of Layers During the Electrochemical Fabrication of Structures
    116.
    发明申请
    Method and Apparatus for Maintaining Parallelism of Layers and/or Achieving Desired Thicknesses of Layers During the Electrochemical Fabrication of Structures 有权
    在电化学制造结构期间维持层的平行化和/或实现层的期望厚度的方法和装置

    公开(公告)号：US20140231263A1

    公开(公告)日：2014-08-21

    申请号：US14191061

    申请日：2014-02-26

    Applicant: MICROFABRICA INC.

    Inventor： Uri Frodis ,  Adam L. Cohen ,  Michael S. Lockard

    IPC: C25D5/48

    CPC classification number: C25D5/48 ,  B33Y10/00 ,  B81C1/00492 ,  B81C99/0065 ,  B81C2201/0104 ,  B81C2201/0197 ,  C25D1/00 ,  C25D1/003 ,  C25D5/022 ,  C25D5/10 ,  C25D21/12 ,  H01L21/2885 ,  H01L21/76885 ,  Y10T156/1052

    Abstract: Some embodiments of the present invention provide processes and apparatus for electrochemically fabricating multilayer structures (e.g. mesoscale or microscale structures) with improved endpoint detection and parallelism maintenance for materials (e.g. layers) that are planarized during the electrochemical fabrication process. Some methods involve the use of a fixture during planarization that ensures that planarized planes of material are parallel to other deposited planes within a given tolerance. Some methods involve the use of an endpoint detection fixture that ensures precise heights of deposited materials relative to an initial surface of a substrate, relative to a first deposited layer, or relative to some other layer formed during the fabrication process. In some embodiments planarization may occur via lapping while other embodiments may use a diamond fly cutting machine.

    Abstract translation: 本发明的一些实施例提供了用于电化学制造多层结构（例如中尺度或微结构）的方法和装置，其具有改进的端点检测和用于在电化学制造过程中被平坦化的材料（例如层）的并行维护。 一些方法涉及在平坦化期间使用夹具，其确保材料的平面化平面平行于给定公差内的其它沉积平面。 一些方法涉及使用端点检测夹具，其相对于第一沉积层或相对于在制造过程期间形成的一些其它层，相对于衬底的初始表面确保沉积材料的精确高度。 在一些实施例中，平面化可以通过研磨发生，而其他实施例可以使用金刚石切片机。

    POLISHING COMPOSITION FOR NICKEL-PHOSPHOROUS-COATED MEMORY DISKS
    117.
    发明申请
    POLISHING COMPOSITION FOR NICKEL-PHOSPHOROUS-COATED MEMORY DISKS 有权
    用于镍 - 磷光体存储盘的抛光组合物

    公开(公告)号：US20130313226A1

    公开(公告)日：2013-11-28

    申请号：US13478292

    申请日：2012-05-23

    Applicant: Selvaraj Palanisamy Chinnathambi ,  Haresh Siriwardane

    Inventor： Selvaraj Palanisamy Chinnathambi ,  Haresh Siriwardane

    IPC: C09K13/00 ,  B44C1/22

    CPC classification number: C09K3/1463 ,  B81C2201/0104 ,  H01L21/30625 ,  H01L21/3212

    Abstract: The invention provides a chemical-mechanical polishing composition containing wet-process silica, an oxidizing agent that oxidizes nickel-phosphorous, a chelating agent, polyvinyl alcohol, and water. The invention also provides a method of chemically-mechanically polishing a substrate, especially a nickel-phosphorous substrate, by contacting a substrate with a polishing pad and the chemical-mechanical polishing composition, moving the polishing pad and the polishing composition relative to the substrate, and abrading at least a portion of the substrate to polish the substrate.

    Abstract translation: 本发明提供一种含有湿法二氧化硅，氧化镍磷的氧化剂，螯合剂，聚乙烯醇和水的化学机械抛光组合物。 本发明还提供了一种通过使基底与抛光垫和化学机械抛光组合物接触来对基底，特别是镍 - 磷基底进行化学机械抛光的方法，相对于基底移动抛光垫和抛光组合物， 并研磨基底的至少一部分以抛光基底。

    Method of forming non-planar membranes using CMP
    118.
    发明授权
    Method of forming non-planar membranes using CMP 有权
    使用CMP形成非平面膜的方法

    公开(公告)号：US08580691B2

    公开(公告)日：2013-11-12

    申请号：US13232012

    申请日：2011-09-14

    Applicant: Andrew B. Graham ,  Gary Yama ,  Gary O'Brien

    Inventor： Andrew B. Graham ,  Gary Yama ,  Gary O'Brien

    IPC: H01L21/302 ,  H01L21/461

    CPC classification number: B81C1/00103 ,  B81B2203/0376 ,  B81C2201/0104

    Abstract: A method of shaping a substrate in one embodiment includes providing a first support layer, providing a first shaping pattern on the first support layer, providing a substrate on the first shaping pattern, performing a first chemical mechanical polishing (CMP) process on the substrate positioned on the first shaping pattern, and removing the once polished substrate from the first shaping pattern.

    Abstract translation: 在一个实施例中，成形衬底的方法包括提供第一支撑层，在第一支撑层上提供第一成形图案，在第一成形图案上提供衬底，在定位的衬底上执行第一化学机械抛光（CMP）工艺 在第一成形图案上，并且从第一成形图案去除一次抛光的基板。

    Electrochemical fabrication methods for producing multilayer structures including the use of diamond machining in the planarization of deposits of material
    119.
    发明申请
    Electrochemical fabrication methods for producing multilayer structures including the use of diamond machining in the planarization of deposits of material 审中-公开
    用于生产多层结构的电化学制造方法，包括在平坦化材料沉积中使用金刚石加工

    公开(公告)号：US20050202180A1

    公开(公告)日：2005-09-15

    申请号：US11029165

    申请日：2005-01-03

    Applicant: Adam Cohen ,  Uri Frodis ,  Michael Lockard ,  Ananda Kumar ,  Gang Zhang ,  Dennis Smalley

    Inventor： Adam Cohen ,  Uri Frodis ,  Michael Lockard ,  Ananda Kumar ,  Gang Zhang ,  Dennis Smalley

    IPC: B05D1/38 ,  C08K3/00 ,  C25D3/30 ,  C25D3/38 ,  C25D3/48 ,  C25D5/02 ,  C25D5/10 ,  C25D21/12 ,  H01L21/288 ,  H01L21/301 ,  H01L21/302 ,  H01L21/4763 ,  H01L21/768

    CPC classification number: C25D5/48 ,  B33Y10/00 ,  B81C1/00492 ,  B81C99/0065 ,  B81C2201/0104 ,  B81C2201/0197 ,  C25D1/00 ,  C25D1/003 ,  C25D5/022 ,  C25D5/10 ,  C25D21/12 ,  H01L21/2885 ,  H01L21/76885 ,  Y10T156/1052

    Abstract: Electrochemical fabrication methods for forming single and multilayer mesoscale and microscale structures are disclosed which include the use of diamond machining (e.g. fly cutting or turning) to planarize layers. Some embodiments focus on systems of sacrificial and structural materials which are useful in Electrochemical fabrication and which can be diamond machined with minimal tool wear (e.g. Ni—P and Cu, Au and Cu, Cu and Sn, Au and Cu, Au and Sn, and Au and Sn—Pb), where the first material or materials are the structural materials and the second is the sacrificial material). Some embodiments focus on methods for reducing tool wear when using diamond machining to planarize structures being electrochemically fabricated using difficult-to-machine materials (e.g. by depositing difficult to machine material selectively and potentially with little excess plating thickness, and/or pre-machining depositions to within a small increment of desired surface level (e.g. using lapping or a rough cutting operation) and then using diamond fly cutting to complete he process, and/or forming structures or portions of structures from thin walled regions of hard-to-machine material as opposed to wide solid regions of structural material.

    Abstract translation: 公开了用于形成单层和多层中尺度和微结构的电化学制造方法，其包括使用金刚石加工（例如飞切或车削）来平坦化层。 一些实施例集中于可用于电化学制造的牺牲和结构材料的系统，并且可以以最小的工具磨损（例如Ni-P和Cu，Au和Cu，Cu和Sn，Au和Cu，Au和Sn， 和Au和Sn-Pb），其中第一材料或材料是结构材料，第二材料是牺牲材料）。 一些实施例着重于在使用金刚石加工以平面化使用难以加工的材料进行电化学制造的结构（例如，通过沉积难以机械材料选择性且潜在地具有少量多余电镀厚度和/或预加工沉积 到所需表面水平的小增量（例如使用研磨或粗切割操作），然后使用金刚石飞切切割来完成其加工，和/或从硬质材料的薄壁区域形成结构或部分结构 而不是结构材料的宽固体区域。

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