公开(公告)号：US09019035B2

公开(公告)日：2015-04-28

申请号：US12674221

申请日：2008-07-24

Applicant: Risato Ohhira

Inventor： Risato Ohhira

IPC: H01P3/08 ,  H05K1/02 ,  H01P1/04 ,  H01L23/66

CPC classification number: H05K1/0219 ,  H01L23/66 ,  H01L2223/6616 ,  H01L2223/6627 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/01019 ,  H01L2924/09701 ,  H01L2924/15192 ,  H01L2924/15313 ,  H01L2924/15323 ,  H01L2924/16195 ,  H01L2924/19033 ,  H01L2924/3011 ,  H01P1/047 ,  H01P3/08 ,  H05K1/0253 ,  H05K1/0298 ,  H05K2201/0715 ,  H05K2201/093 ,  H05K2201/09363 ,  H05K2201/09618 ,  H05K2201/09663 ,  H01L2924/00014 ,  H01L2924/00

Abstract: The high-frequency wiring board of the present invention includes: first coplanar lines provided with a first signal line and a first planar ground pattern formed on the same wiring layer as the first signal line; second coplanar lines provided with a second signal line formed on a different wiring layer than the first signal line and a second planar ground pattern formed on the same wiring layer as the second signal line; and a first ground pattern formed on the same wiring layer as the first coplanar lines. The first coplanar lines and the second coplanar lines are connected. At least the first ground pattern and the first planar ground pattern are separated in a region following the second signal line from the connection of the first signal line and the second signal line.

Abstract translation: 本发明的高频布线基板包括：第一共面线，设置有与第一信号线在同一布线层上形成的第一信号线和第一平面接地图案; 第二共面线设置有形成在与第一信号线不同的布线层上的第二信号线和形成在与第二信号线相同的布线层上的第二平面接地图案; 以及形成在与第一共面线相同的布线层上的第一接地图案​​。 第一共面线和第二共面线被连接。 至少第一接地图案​​和第一平面接地图案在第二信号线之后的区域中与第一信号线和第二信号线的连接分开。

公开(公告)号：US20130048618A1

公开(公告)日：2013-02-28

申请号：US13695870

申请日：2011-03-23

Applicant: Jan van Aalst ,  Drago Kovacic ,  Bostjan Podobnik

Inventor： Jan van Aalst ,  Drago Kovacic ,  Bostjan Podobnik

IPC: B23K26/36

CPC classification number: H05K3/027 ,  B23K26/36 ,  B23K2101/38 ,  H05K2201/062 ,  H05K2201/09363

Abstract: A method for partial detachment of a defined area of a conductive layer using a laser beam includes forming a conductor track with a defined path from the conductive layer on the substrate, the path defining main axes. The area is segmented into zones. A linear recess is provided along a respective perimeter of each of the zones. Each of the zones has a strip shape such that the recesses extend along paths that are substantially straight lines not parallel to either of the main axes. One of the zones to be removed is heated using laser radiation until adhesion of the conductive layer to the substrate is substantially reduced and the zone to be removed is detached in a surface-wide manner from the substrate under external influences. Laser-beam parameters are set such that only the conductive layer is removed without affecting an underlying substrate.

Abstract translation: 使用激光束对导电层的限定区域进行部分分离的方法包括从基板上的导电层形成具有限定路径的导体轨道，该路径限定主轴。 该区域被分割成区域。 沿着每个区域的相应周边设置有线性凹槽。 每个区域具有带状，使得凹部沿着不平行于任一主轴线的基本直线的路径延伸。 使用激光辐射来加热待除去的区域之一，直到导电层与基底的粘合性大大降低，并且在外部影响下将被去除的区域以表面宽度方式从衬底上分离。 激光束参数被设置为使得仅去除导电层而不影响下面的衬底。

公开(公告)号：US08157430B2

公开(公告)日：2012-04-17

申请号：US12527336

申请日：2007-10-10

Applicant: Tetsuya Hamada

Inventor： Tetsuya Hamada

IPC: F21V7/22

CPC classification number: G02B6/0073 ,  G02B6/0068 ,  G02B6/0083 ,  G02B6/0085 ,  G02F1/133615 ,  H05K1/0209 ,  H05K1/189 ,  H05K3/28 ,  H05K3/321 ,  H05K2201/09363 ,  H05K2201/09781 ,  H05K2201/10106 ,  H05K2201/10969 ,  H05K2201/2054

Abstract: Electrode terminals (33a, 33b) of an LED (3) and a mounting wiring (42) of an FPC (4) are bonded by using a conductive adhesive, and a metal slug (31) of the LED (3) and a heat dissipation wiring (43) of the FPC (4) are bonded by using the conductive adhesive. The heat dissipation wiring (43) corresponds to each of the LEDs (3) and isolates the LEDs one from the other, not permitting electricity to be carried between them.

Abstract translation: LED（3）的电极端子（33a，33b）和FPC（4）的安装布线（42）通过使用导电粘合剂和LED（3）的金属块（31）和热 通过使用导电粘合剂将FPC（4）的耗散布线（43）接合。 散热线（43）对应于每个LED（3），并且将LED彼此隔离，不允许在它们之间承载电力。

公开(公告)号：US07683384B2

公开(公告)日：2010-03-23

申请号：US11447300

申请日：2006-06-06

Applicant: David Fisher ,  Philip Heft ,  Rocco Vetro

Inventor： David Fisher ,  Philip Heft ,  Rocco Vetro

IPC: H01L27/15

CPC classification number: G09F9/33 ,  G09F9/302 ,  G09F9/3023 ,  H05K1/141 ,  H05K3/321 ,  H05K2201/09227 ,  H05K2201/09363 ,  H05K2201/10106 ,  H05K2201/2054

Abstract: An alphanumeric display includes a substrate that has top and bottom surfaces, a plurality of electrical contacts on the top surface, a plurality of light-emitting electronic devices mounted on the top surface, and a plurality of electrical pads on the bottom surface. The electrical contacts are connected to at least one light-emitting electronic device, and each of the light-emitting electronic devices is electrically connected with corresponding ones of the electrical contacts. The electrical pads are electrically connected to corresponding ones of the electrical contacts for communicating to the light-emitting electronic devices external sources of electrical power and control signals. The electrical pads on the bottom surface are arranged in a pattern to facilitate connections to the device using a conductive adhesive.

Abstract translation: 字母数字显示器包括具有顶表面和底表面的基板，顶表面上的多个电触点，安装在顶表面上的多个发光电子器件以及底表面上的多个电焊盘。 电触点连接至少一个发光电子器件，并且每个发光电子器件与相应的电触点电连接。 电焊盘电连接到对应的电触头，用于与发光电子设备的外部电源和控制信号源通信。 底表面上的电焊盘以图案布置以便于使用导电粘合剂连接到装置。

公开(公告)号：US20100053950A1

公开(公告)日：2010-03-04

申请号：US12548947

申请日：2009-08-27

Applicant: Kazunari HIGUCHI ,  Takayoshi Moriyama ,  Sumio Hashimoto ,  Shinichi Kumashiro

Inventor： Kazunari HIGUCHI ,  Takayoshi Moriyama ,  Sumio Hashimoto ,  Shinichi Kumashiro

IPC: F21V29/00 ,  F21V33/00

CPC classification number: H05K1/0271 ,  F21S8/026 ,  F21V19/001 ,  F21V21/04 ,  F21V29/505 ,  F21V29/75 ,  F21V29/86 ,  F21V29/89 ,  F21Y2105/10 ,  F21Y2115/10 ,  H05K1/0203 ,  H05K2201/09027 ,  H05K2201/09063 ,  H05K2201/09363

Abstract: A down-light has a main body, a substrate, a plurality of LEDs, a reflector, a central boss, a central screw and peripheral screws. The main body has a mounting area. The substrate having LEDs is assembled in the mounting area. The reflector is attached to the main body with the substrate interposed therebetween, and reflects light emitted from the LEDs. The central boss is formed on the mounting area to correspond to a central part of the substrate. The central screw fixes the central part of the substrate to the central boss from the reflector side. Peripheral screws fix the substrate to the main body by pulling the reflector from the main body side.

Abstract translation: 底灯具有主体，基板，多个LED，反射器，中心凸台，中心螺钉和外围螺钉。 主体有一个安装区域。 具有LED的基板组装在安装区域中。 反射器被安置在主体上，衬底插入其中，并且反射从LED发射的光。 中心凸台形成在安装区域上以对应于基板的中心部分。 中心螺钉将基板的中心部分从反射器侧固定到中心凸台。 外围螺钉通过从主体侧拉动反射器将基板固定到主体上。

公开(公告)号：US20090266587A1

公开(公告)日：2009-10-29

申请号：US12423958

申请日：2009-04-15

Applicant: Chong-han Park ,  Byoung-woo Kim

Inventor： Chong-han Park ,  Byoung-woo Kim

IPC: H05K1/00 ,  C23F1/00

CPC classification number: H05K3/107 ,  H05K1/0393 ,  H05K3/0017 ,  H05K3/108 ,  H05K3/244 ,  H05K3/388 ,  H05K2201/09363 ,  H05K2203/0585 ,  H05K2203/0723 ,  H05K2203/1184 ,  H05K2203/1545

Abstract: Provided is a method of forming a fine pitch in a flexible printed circuit board (FPCB) having an increased adhesive property of wirings and an improved insulating property between the wirings. The method includes etching regions where wirings are to be formed on a base substrate; forming conductive layers on the etched regions; forming a photoresist film on a substrate between the etched regions; forming the wirings by forming the conductive layers on the etched regions to be higher than the substrate; and removing the photoresist film.

Abstract translation: 提供了在具有增加的布线粘合性和布线之间改进的绝缘性的柔性印刷电路板（FPCB）中形成细间距的方法。 该方法包括在基底基板上形成布线的蚀刻区域; 在蚀刻区域上形成导电层; 在蚀刻区域之间的衬底上形成光致抗蚀剂膜; 通过在蚀刻区域上形成高于衬底的导电层来形成布线; 并除去光致抗蚀剂膜。

公开(公告)号：US20090212317A1

公开(公告)日：2009-08-27

申请号：US12038200

申请日：2008-02-27

Applicant: Boris Kolodin ,  James Reginelli

Inventor： Boris Kolodin ,  James Reginelli

IPC: H01L33/00 ,  H01L21/60

CPC classification number: H01L25/0753 ,  H01L33/62 ,  H01L2924/0002 ,  H01L2924/01019 ,  H01L2924/01079 ,  H05K3/027 ,  H05K3/064 ,  H05K2201/09363 ,  H05K2201/10106 ,  H05K2203/1476 ,  Y10T29/49155 ,  H01L2924/00

Abstract: A packaging method comprises: forming a circuit board by forming a substantially continuous conductive layer on an insulating board and removing selected portions of the continuous conductive layer to define an electrically conductive trace; laser cutting the electrically conductive trace to define sub-traces electrically isolated from each other by a laser-cut gap formed by the laser cutting; and bonding a light emitting diode (LED) chip to the circuit board across or adjacent to the laser-cut gap, the bonding including operatively electrically connecting an electrode of the LED chip to one of the sub-traces without using an interposed submount. A semiconductor package comprises an LED chip flip-chip bonded to sub-traces of an electrically conductive trace of a circuit board, the sub-traces being electrically isolated from each other by a narrow gap of less than or about 100 microns.

Abstract translation: 封装方法包括：通过在绝缘板上形成基本上连续的导电层形成电路板，并移除所述连续导电层的选定部分以限定导电迹线; 激光切割导电迹线以通过激光切割形成的激光切割间隙来彼此电隔离的子迹线; 以及将发光二极管（LED）芯片连接到所述激光切割间隙上或与所述激光切割间隙相邻的所述电路板，所述接合包括在不使用插入的基座的情况下将所述LED芯片的电极可操作地电连接到所述子迹线之一。 半导体封装包括结合到电路板的导电迹线的子迹线的LED芯片倒装芯片，子迹线通过小于或约100微米的窄间隙彼此电隔离。

公开(公告)号：US20090107700A1

公开(公告)日：2009-04-30

申请号：US12301409

申请日：2007-05-18

Applicant: Motonari Ogura

Inventor： Motonari Ogura

IPC: H05K1/00

CPC classification number: H05K1/0271 ,  H05K1/0298 ,  H05K1/111 ,  H05K1/117 ,  H05K2201/093 ,  H05K2201/09363 ,  H05K2201/09663 ,  H05K2201/09672 ,  H05K2201/10689 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49155

Abstract: A printed wiring board includes a substrate member, terminals and wiring pattern. The terminals are formed in a specific shape on the substrate member and arranged to be aligned in a specific arrangement direction on the substrate member. The wiring pattern is formed on the opposite side across the substrate member from a terminal portion where the terminals are formed, and a plurality of slits are formed extending in a direction perpendicular to the specific arrangement direction.

Abstract translation: 印刷电路板包括基板部件，端子和布线图案。 端子在基板部件上形成为特定的形状，并且被布置成在基板部件上沿特定排列方向对齐。 布线图案从形成有端子的端子部分的基板部件的相反侧形成，并且沿垂直于特定布置方向的方向形成多个狭缝。

公开(公告)号：US07525803B2

公开(公告)日：2009-04-28

申请号：US11344507

申请日：2006-01-31

Applicant: Jason Walter Swanson ,  Bryan Wayne McCoy ,  Arthur Kenneth Dewyer

Inventor： Jason Walter Swanson ,  Bryan Wayne McCoy ,  Arthur Kenneth Dewyer

IPC: H05K7/20

CPC classification number: H05K1/0206 ,  H05K1/0209 ,  H05K1/0298 ,  H05K2201/09363 ,  H05K2201/09781

Abstract: A power converter including a printed circuit board (PCB) having a plurality of heat conductive layers configured to sink heat generated by the power converter electronics. Each of these heat conductive layers are comprised of thermally conductive material configured as planar sheets, each of these heat conductive layers being coupled to at least one wire to sink heat therefrom, such as via a wire of an input cable and/or output cable. Advantageously, a more compact power converter is realized having improved power output while operating within safety guidelines.

Abstract translation: 一种功率转换器，包括具有多个导热层的印刷电路板（PCB），所述导热层被配置为吸收由所述功率转换器电子器件产生的热量。 这些导热层中的每一个由配置为平面片的导热材料构成，这些导热层中的每一个都耦合到至少一根导线，从而通过输入电缆和/或输出电缆的导线吸收热量。 有利地，在安全准则下操作时，实现了具有改进的功率输出的更紧凑的功率转换器。

公开(公告)号：US20090014895A1

公开(公告)日：2009-01-15

申请号：US12217643

申请日：2008-07-08

Applicant: Jong-Seok Lim ,  Hyo-Dong Ban

Inventor： Jong-Seok Lim ,  Hyo-Dong Ban

IPC: H01L23/538 ,  H05K1/00 ,  H05K3/00

CPC classification number: H05K1/0271 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/562 ,  H01L23/585 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0657 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/4911 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01083 ,  H01L2924/19107 ,  H01L2924/30105 ,  H05K2201/09363 ,  H05K2201/09781 ,  H05K2201/10378 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

Abstract: An interposer chip in accordance includes an insulating layer, conductive patterns and a dummy pattern. The conductive patterns are formed on the insulating layer. The dummy pattern is formed on the insulating layer to suppress a bending of the insulating layer. Further, the dummy pattern can have first isolating grooves formed along peripherals of the conductive patterns to isolate the dummy pattern from the conductive patterns. Thus, the interposer chip is not vulnerable to being bent. Further, an electrical short between the conductive patterns through the dummy pattern caused by particles is substantially avoided.

Abstract translation: 根据绝缘层，导电图案和虚拟图案，插入器芯片。 导电图案形成在绝缘层上。 在绝缘层上形成虚设图形以抑制绝缘层的弯曲。 此外，虚设图案可以具有沿着导电图案的外围形成的第一隔离槽，以将虚设图案与导电图案隔离。 因此，插入器芯片不易弯曲。 此外，基本上避免了通过由颗粒引起的虚拟图案的导电图案之间的电短路。