中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

940 records (took 0.025 seconds)

    Inductance element, laminated electronic component, laminated electronic component module and method for producing these element, component and module
    114.
    发明公开
    Inductance element, laminated electronic component, laminated electronic component module and method for producing these element, component and module 审中-公开
    电感元件，层叠型电子部件模块与这些设备，部件和模块的层叠型电子部件及其制造方法

    公开(公告)号：EP1443529A1

    公开(公告)日：2004-08-04

    申请号：EP04002176.8

    申请日：2004-01-30

    Applicant: TDK Corporation

    Inventor： Takaya Minoru, c/o TDK Corporation ,  Endo, Toshikazu, c/o TDK Corporation

    IPC: H01F17/00 ,  H01F41/04 ,  H01L23/64 ,  H01L21/02

    CPC classification number: H01F41/041 ,  H01F17/0033 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/19105 ,  H05K1/165 ,  H05K3/4602 ,  H05K2201/097 ,  H01L2924/00014

    Abstract: A laminated electronic component including at least one inductance element and produced froma laminate having electrical insulators and electrical conductors laminated alternately. The inductance element is formed as a helical coil having a plurality of turns each constituted by four sides. The inductance element has pairs of parallel conductor pieces and pairs of bridging conductor pieces. Each pair of parallel conductor pieces form two of the four sides of one turn of the coil. Each pair of bridging conductor pieces form the other two sides of one turn of the coil. Grooves are formed in the laminate to thereby form the parallel conductor pieces. The grooves are filled with an electrically insulating material. The bridging conductor pieces are formed on the electrically insulating material.

    Abstract translation: 甲层叠型电子部件包括至少一个电感元件和产生弗罗马层压具有电绝缘体和电导体交替层叠。 电感元件形成为具有各匝由四边构成的多个A螺旋线圈。 电感元件具有对平行的导体片和对桥接导体片的。 每对平行的导体片形成的两个线圈的一匝的四个侧面。 每对桥接导体片的形成的线圈的一匝的另外两侧。 槽在层叠物形成，从而形成平行的导体片。 槽填充有在电绝缘材料。 桥接导体片形成在电绝缘材料。

    ELECTRONIC TRANSFORMER/INDUCTOR DEVICES AND METHODS FOR MAKING SAME
    115.
    发明公开
    ELECTRONIC TRANSFORMER/INDUCTOR DEVICES AND METHODS FOR MAKING SAME 审中-公开
    电子发送/INDUKTIVITÄTSBAUELEMENTE及其制备方法

    公开(公告)号：EP1325545A2

    公开(公告)日：2003-07-09

    申请号：EP01975308.6

    申请日：2001-09-24

    Applicant: M-Flex Multi-Fineline Electronix, Inc.

    Inventor： HARDING, Philip, A.

    IPC: H02M1/00

    CPC classification number: H01F41/046 ,  H01F17/0033 ,  H05K1/165 ,  H05K3/06 ,  H05K3/429 ,  H05K3/4611 ,  H05K2201/086 ,  H05K2201/09063 ,  H05K2201/097 ,  H05K2201/10416 ,  Y10S29/016 ,  Y10T29/4902 ,  Y10T29/49073 ,  Y10T29/49075 ,  Y10T29/49165

    Abstract: The present invention relates to the methods of construction for inductive components of, preferably, ferromagnetic materials such as inductors, chokes, and transformers when used as an integral part of the fabrication of PCB's or FLEX's. In one preferred embodiment, holes (56, 58) are formed through a ferromagnetic substrate (50) and plated with conductive material. The arrangement of these holes, and the subsequent design that ensues, will form the inductive components within the plane of the media in which the device is formed; using the substrate (50) for a magnetic core (90). By using this approach, the inductive components can be miniaturized to physical sizes compatible with the requirements of modern surface mount technology (SMT) for integrated circuitry (IC). This process also allows these components to be fabricated using mass production techniques, thereby avoiding the need to handle discrete devices during the manufacturing process. In another preferred embodiment, a series of thin, concentric high permeability rings (315) are etched on a substrate (330) to provide high permeability transformers and inductors having minimal eddy current effects.

    Flat flexible cable with ground conductors
    118.
    发明公开
    Flat flexible cable with ground conductors 有权
    Flexibles Flachkabel mit Erdleitern

    公开(公告)号：EP1037512A2

    公开(公告)日：2000-09-20

    申请号：EP00105207.5

    申请日：2000-03-13

    Applicant: MOLEX INCORPORATED

    Inventor： Brunker, David L.

    IPC: H05K1/02 ,  H01B7/08

    CPC classification number: H05K1/0228 ,  H01B7/0876 ,  H05K1/0219 ,  H05K1/0245 ,  H05K2201/09263 ,  H05K2201/09672 ,  H05K2201/097

    Abstract: A flexible circuit member includes first and second pseudo-twisted flexible conductors on a flexible dielectric substrate. The first pseudo-twisted conductor is on a first side of the substrate and the second pseudo-twisted conductor is on a second side of the substrate. Each pseudo-twisted conductor includes a periodic pattern with the first pseudo-twisted conductor being shifted longitudinally relative to the second pseudo-twisted conductor by one half of a period of the periodic pattern. A set of first and second additional conductors are also provided on the dielectric substrate. The first additional conductor is on the first side of the substrate and is spaced from and generally follows the shape of the first pseudo-twisted conductor. The second additional conductor is on the second side of the substrate and is spaced from and generally follows the shape of the second pseudo-twisted conductor. These first and second additional conductors may be coupled to reference or ground potential so as to provide a grounding system for the flexible circuit member.

    Abstract translation: 柔性电路构件包括在柔性电介质衬底上的第一和第二伪扭绞柔性导体。 第一伪扭绞导体位于衬底的第一侧上，第二伪扭绞导体位于衬底的第二侧上。 每个假捻导体包括周期性图案，其中第一伪扭绞导体相对于第二假捻导体纵向移动周期图案周期的一半。 一组第一和第二附加导体也设置在电介质基片上。 第一附加导体位于衬底的第一侧上，并且与第一假捻导体的形状间隔开并且大致遵循形状。 第二附加导体位于衬底的第二侧上，并且与第二假捻导体的形状间隔开并且大体上遵循第二伪导体的形状。 这些第一和第二附加导体可以耦合到参考或接地电位，以便为柔性电路构件提供接地系统。

    Fine pitch via formation using diffusion patterning techniques
    119.
    发明公开
    Fine pitch via formation using diffusion patterning techniques 失效
    的交通线路与细间距，其中图案的方法是通过扩散的方式制备适用

    公开(公告)号：EP0828291A2

    公开(公告)日：1998-03-11

    申请号：EP97202495.4

    申请日：1997-08-12

    Applicant: DELCO ELECTRONICS CORPORATION

    Inventor： Drake, Jacquelynn Kay ,  Knigga, Bradley Ray

    IPC: H01L21/48 ,  H01L23/498

    CPC classification number: H01L23/49827 ,  H01L21/4803 ,  H01L21/486 ,  H01L2224/16 ,  H01L2924/01078 ,  H05K3/3452 ,  H05K2201/09381 ,  H05K2201/097 ,  H05K2201/0989 ,  H05K2201/10674 ,  H05K2203/0511

    Abstract: A process for developing fine pitch vias in a dielectric material, such as thick-film and tape dielectrics, and dielectric materials formed thereby. Via formation is particularly amenable to diffusion patterning techniques, in which an imaging material is deposited in the form of complementary interdigitized shapes that maximize image material volume in order to form vias that extend completely through the dielectric material, while also assuring sufficient via spacing to prevent merging of adjacent vias during imaging. A preferred shape for the resulting diffusion-imaged vias, and therefore the deposited imaging material, is triangular, with the orientation of adjacent triangles being such that spacing between the deposited imaging material is comparable to the spacing between conductor traces associated with the resulting vias.

    Abstract translation: 如厚膜和磁带介质，以及由此形成的介电材料：一种用于开发在介电材料，彩色细间距的通孔的过程。 通过形成特别适合于扩散图案化技术，在其中成像材料在互补interdigitized形状的形式被沉积做最大化，以便形成通孔并穿过所述介电材料，完全延伸呼叫这样同时确保经由间距，以防止足够的图像材料体积 在成像期间相邻的通孔的合并。 对于所得到的扩散成像导通孔优选的形状，因此所沉积的成像材料，是三角形的，与被检查相邻三角形的取向做沉积成像材料之间的间隔是与用所得到的导通孔相关联的导体迹线之间的间距。

Patent Agency Ranking