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    Surface mount semiconductor device
    113.
    发明授权
    Surface mount semiconductor device 失效
    表面贴装半导体器件

    公开(公告)号：US5635760A

    公开(公告)日：1997-06-03

    申请号：US697604

    申请日：1996-08-27

    Applicant: Toru Ishikawa

    Inventor： Toru Ishikawa

    IPC: H01L23/50 ,  H01L23/31 ,  H01L23/495 ,  H01L25/10 ,  H05K1/18 ,  H05K3/30 ,  H05K3/34 ,  H01L23/28

    CPC classification number: H01L23/3107 ,  H01L23/49555 ,  H01L25/105 ,  H05K1/181 ,  H05K3/303 ,  H01L2224/48247 ,  H01L2225/1005 ,  H01L2225/1029 ,  H01L2225/107 ,  H05K2201/09954 ,  H05K2201/10454 ,  H05K2201/10462 ,  H05K2201/10522 ,  H05K2201/10568 ,  H05K2201/10689 ,  H05K2201/10696 ,  H05K3/3421 ,  Y02P70/611 ,  Y02P70/613

    Abstract: A semiconductor device of the present invention includes a plurality of lead terminals extending from only one side surface of a package main body having major surfaces and side surfaces, the lead terminal extending parallel to the major surface by a predetermined size and being substantially perpendicularly bent to project from the major surface by a predetermined size in a vertical mount type semiconductor device, or being substantially perpendicularly bent to project from the major surface by a predetermined size and bent again at a distal end portion in parallel to the major surface in a horizontal mount type semiconductor device, and a supporting means projecting from the package main body by substantially the same size as the projecting size of the lead terminals. A method of manufacturing the semiconductor device of the present invention includes the steps of lead frame formation, chip mounting and bonding, mold sealing, and lead terminal formation.

    Abstract translation: 本发明的半导体器件包括从仅具有主表面和侧表面的封装主体的仅一个侧表面延伸的多个引线端子，引线端子平行于主表面延伸预定尺寸并基本上垂直弯曲成 在垂直安装型半导体器件中从主表面突出预定尺寸，或者基本上垂直弯曲以从主表面突出预定尺寸，并且在水平安装件中平行于主表面的远端部分再次弯曲 以及从封装主体以与引线端子的突出尺寸大致相同的尺寸突出的支撑装置。 本发明的半导体器件的制造方法包括引线框架形成，芯片安装和接合，模具密封和引线端子形成的步骤。

    Integrated circuit device having improved post for surface-mount package
    114.
    发明授权
    Integrated circuit device having improved post for surface-mount package 失效
    具有改进的用于表面贴装封装的柱的集成电路器件

    公开(公告)号：US5555488A

    公开(公告)日：1996-09-10

    申请号：US6899

    申请日：1993-01-21

    Applicant: Robert N. McLellan ,  Anthony M. Chiu

    Inventor： Robert N. McLellan ,  Anthony M. Chiu

    IPC: H01L21/60 ,  H01L23/28 ,  H01L23/495 ,  H05K3/30 ,  H05K7/02 ,  H01L23/544

    CPC classification number: H05K3/301 ,  H01L23/49555 ,  H05K3/303 ,  H01L2924/0002 ,  H05K2201/10454 ,  H05K2201/10568 ,  H05K2201/10696 ,  H05K2203/167 ,  Y02P70/613 ,  Y10T29/49121 ,  Y10T29/49139

    Abstract: An electronic device (10) includes a package (16) having two posts (30) suitable for insertion in PCB holes. Package (16) presents a lengthwise molding plane (32) along which the upper portion (42) and bottom portion (44) of package (16) are mated during the molding process. Posts (30) are disposed substantially exclusively in bottom portion (44) so that posts (30) are asymmetric about lengthwise molding plane (32). Thus, even if a top mold (42a) and a bottom mold (44a) are misaligned there will be no effect on the dimensional tolerance of posts (30) and thus the tolerance of post (30) can be closely matched with a PCB hole (20) tolerance to insure a snug fit. Thus, device (10) is mounted edgewise on a PCB (18) by insertion of posts (30) into PCB holes (20) so that tips (24) of lead fingers (4 14) can be connected to PCB (18) by surfacing-mounting techniques or the like.

    Abstract translation: 电子设备（10）包括具有适于插入PCB孔中的两个柱（30）的封装（16）。 包装件（16）呈现纵向成型平面（32），在模制过程中，包装件（16）的上部分（42）和底部部分（44）沿着该成型平面配合。 柱（30）基本上仅设置在底部（44）中，使得柱（30）在纵向成型平面（32）上是不对称的。 因此，即使顶模（42a）和底模（44a）不对准，也不会影响柱（30）的尺寸公差，因此柱（30）的公差可以与PCB孔 （20）公差，以确保贴合。 因此，装置（10）通过将柱（30）插入PCB孔（20）而沿PCB方式安装在PCB（18）上，使得引线指（4,14）的尖端（24）可以通过 表面贴装技术等。

    Edge-mounted, surface-mount integrated circuit device
    115.
    发明授权
    Edge-mounted, surface-mount integrated circuit device 失效
    边缘安装的表面贴装集成电路器件

    公开(公告)号：US5352851A

    公开(公告)日：1994-10-04

    申请号：US941996

    申请日：1992-09-08

    Applicant: James S. Wallace ,  Ernie Russell ,  Daniel Baudouin

    Inventor： James S. Wallace ,  Ernie Russell ,  Daniel Baudouin

    IPC: H01L23/495 ,  H05K3/30 ,  H05K3/34 ,  H01L23/02

    CPC classification number: H01L23/4951 ,  H01L23/49555 ,  H05K3/303 ,  H01L2924/0002 ,  H05K2201/10454 ,  H05K2201/10568 ,  H05K2201/10659 ,  H05K2201/10696 ,  H05K2203/167 ,  H05K3/3426 ,  Y02P70/613

    Abstract: An edge-mounted integrated circuit device (10 ) includes a semiconductor die (11) and a lead frame (15) attached to the semiconductor die (11). The lead frame (15) includes a plurality of leads (14) electrically connected to the semiconductor die and lead frame supports (16, 18). A package (12) encapsulates the semiconductor die and a portion of the lead frame (15). The leads (14) extend from the package (12) and are bent to present a face for surface mount connection to conductors on a substrate. The supports (16, 18) extend from the package (12) for contacting the substrate to support the device (10) in position for soldering the leads (14) to conductors on the substrate.

    Abstract translation: 边缘安装集成电路器件（10）包括半导体管芯（11）和连接到半导体管芯（11）的引线框架（15）。 引线框架（15）包括电连接到半导体管芯和引线框架支撑件（16,18）的多个引线（14）。 封装（12）封装半导体管芯和引线框架（15）的一部分。 引线（14）从封装（12）延伸并被弯曲以呈现用于表面安装连接到衬底上的导体的面。 支撑件（16,18）从用于接触基板的包装（12）延伸，以将装置（10）支撑在适当位置，以将引线（14）焊接到基板上的导体。

    Method of making a relatively flat semiconductor package having a semiconductor chip encapsulated in molded material
    116.
    发明授权
    Method of making a relatively flat semiconductor package having a semiconductor chip encapsulated in molded material 失效
    制造具有封装在模制材料中的半导体芯片的相对平坦的半导体封装的方法

    公开(公告)号：US5275975A

    公开(公告)日：1994-01-04

    申请号：US907258

    申请日：1992-07-01

    Applicant: Daniel A. Baudouin ,  Ernest J. Russell

    Inventor： Daniel A. Baudouin ,  Ernest J. Russell

    IPC: H01L23/495 ,  H05K3/30 ,  H01L21/60

    CPC classification number: H01L23/49555 ,  H05K3/303 ,  H01L2924/0002 ,  H05K2201/10454 ,  H05K2201/10568 ,  H05K2201/10696 ,  H05K2203/167 ,  Y02P70/613 ,  Y10T29/49121

    Abstract: A flat package for semiconductor integrated circuit devices allows edge-mounting and surface-mount. The package may be molded plastic containing a semiconductor chip, and flat leads extend from one edge of the package. The leads are bent to provide an area to solder to conductors on a PC board. Mechanical positioning, mechanical support and spacing are provided by studs extending from the edge of the package adjacent the leads. The studs have stops formed at a position even with flat outer surfaces of the bent leads; the portion outward of the stops fits into holes in the PC board.

    Abstract translation: 用于半导体集成电路器件的扁平封装允许边缘安装和表面贴装。 封装可以是包含半导体芯片的模制塑料，并且扁平引线从封装的一个边缘延伸。 引线被弯曲以提供焊接到PC板上的导体的区域。 机械定位，机械支撑和间距由靠近导线的封装边缘延伸的螺柱提供。 螺柱具有形成在甚至具有弯曲引线的平坦外表面的位置处的止动件; 止动件外侧的部分适合PC板中的孔。

    Edge-mounted, surface-mount package for semiconductor integrated circuit devices
    117.
    发明授权
    Edge-mounted, surface-mount package for semiconductor integrated circuit devices 失效
    用于半导体集成电路器件的边缘安装表面贴装封装

    公开(公告)号：US5260601A

    公开(公告)日：1993-11-09

    申请号：US578058

    申请日：1990-09-05

    Applicant: Daniel A. Baudouin ,  Ernest J. Russell

    Inventor： Daniel A. Baudouin ,  Ernest J. Russell

    IPC: H01L23/495 ,  H05K3/30 ,  H05K7/12 ,  H01L23/50

    CPC classification number: H01L23/49555 ,  H05K3/303 ,  H01L2924/0002 ,  H05K2201/10454 ,  H05K2201/10568 ,  H05K2201/10696 ,  H05K2203/167 ,  Y02P70/613 ,  Y10T29/49121

    Abstract: A flat package for semiconductor integrated circuit devices allows edge-mounting and surface-mount. The package may be molded plastic containing a semiconductor chip, and flat leads extend from one edge of the package. The leads are bent to provide an area to solder to conductors on a PC board. Mechanical positioning, mechanical support and spacing are provided by studs extending from the edge of the package adjacent the leads. The studs have stops formed at a position even with flat outer surfaces of the bent leads; the portion outward of the stops fits into holes in the PC board.

    Abstract translation: 用于半导体集成电路器件的扁平封装允许边缘安装和表面贴装。 封装可以是包含半导体芯片的模制塑料，并且扁平引线从封装的一个边缘延伸。 引线被弯曲以提供焊接到PC板上的导体的区域。 机械定位，机械支撑和间距由靠近导线的封装边缘延伸的螺柱提供。 螺柱具有形成在甚至具有弯曲引线的平坦外表面的位置处的止动件; 止动件外侧的部分适合PC板中的孔。

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