Circuit board with microelectronic elements assembled thereon and method for producing such circuit board
    121.
    发明公开
    Circuit board with microelectronic elements assembled thereon and method for producing such circuit board 审中-公开
    其上安装有微电子组件和方法的印刷电路板用于制造这样的印刷电路板

    公开(公告)号:EP1784063A1

    公开(公告)日:2007-05-09

    申请号:EP05300903.1

    申请日:2005-11-08

    Applicant: Alcatel Lucent

    Abstract: Circuit board (1) and method of producing thereof, the circuit board having a cavity for microstrip to waveguide transition means (2) defined by a hollow space on the walls of which a protection layer (21) is provided. A microelectronic substrate (33) is placed upon an adhesive film (31) adhered onto a surface of the circuit board (1), the adhesive film being pre-cut in selected areas (32) thereof providing openings therethrough. A metal layer (5) is disposed on the resulting structure, wherein a selected part (51) of the metal layer (5) present on a surface of microelectronics substrate (33), facing the hollow space defined by the cavity for microstrip to waveguide transition means (2) is removed.

    Abstract translation: 及其生产的电路板(1)和方法,具有(2)的中空空间中设置保护层(21),其中在墙壁上限定为微带到波导转变装置A空腔电路板上。 一种微电子衬底(33)时的粘合剂膜粘附到所述电路板(1)的表面(31)放置,所述粘合剂膜被预切割成选定区域(32)穿过其设置开口那里。 的金属层(5)设置在所得到的结构,worin金属层(5)的选定部分(51)本(33)的微电子衬底的表面上,对着用于微带到波导由空腔限定的中空空间 过渡装置(2)被除去。

    Compact circuit carrier package
    122.
    发明公开
    Compact circuit carrier package 有权
    紧凑的电路载体外壳

    公开(公告)号:EP1355353A3

    公开(公告)日:2006-06-28

    申请号:EP03252279.9

    申请日:2003-03-07

    Abstract: A circuit carrier assembly includes a plurality of substrates directly secured together by an electrically conductive securing substance. In one example, the securing substance is a conductive epoxy. In another example, the electrically conductive securing substance is solder. Still another example includes a combination of solder and conductive epoxy. A non-conductive epoxy provides further mechanical connection and thermal conductivity between the substrates while also electrically isolating selected portions of the substrates in one example. The electrically conductive securing substance not only mechanically secures the substrates together and provides thermal conductivity between the substrates, which increases the thermal capacitance of the assembly, but also establishes at least one electrically conductive path between the substrates.

    Mehrschichtige gedruckte Schaltungsplatte
    125.
    发明公开
    Mehrschichtige gedruckte Schaltungsplatte 失效
    Mehrschichtige gedruckte Schaltungsplatte。

    公开(公告)号:EP0219627A1

    公开(公告)日:1987-04-29

    申请号:EP86110664.9

    申请日:1986-08-01

    Inventor: Elsener, Josef

    Abstract: Die elektronischen Halbleiterbauelemente oder Hybridbauelemente (1) der mehrschichtigen gedruckten Schaltungsplatte sind zur Verbesserung der Wärmeableitung und zur Erzielung einer grösseren Packungsdichte gehäuselos unmittelbar auf einer gemeinsamen metallischen Trägerplatte (2) befestigt. Die elektronischen Bauelemente (1) sind jeweils in fensterartigen Aufnahmeöffnungen (8) einer ersten an der Trägerplatte (2) befestigten und mit Leiterschichten (5,9,10,11) versehenen Leiterplatte (6) angeordnet und mit Leitern (4) verbonded. Ein Teil der elektrischen Verbindungen der Schaltungsplatte befindet sich in einer die erste Leiterplatte (6) überdeckenden zweiten, mit einer weiteren Leiterschicht (121 versehenen Leiterplatte (7), durch welche die Aufnahmeöffnungen (8) verschlossen werden. Die einzelnen Leiterschichten (5,9 bis 12) sind mittels durchmetallisierter Verbindungs- und/oder Sacklochbohrungen (14, 14',15) elektrisch miteinander verbunden.

    Abstract translation: 为了改善散热并实现更高的封装密度,多层印刷电路板的电子半导体部件或混合部件(1)直接安装在公共金属载体板(2)上,而不会包围。 电子部件(1)分别布置在安装在承载板(2)上并具有导体层(5,9,10,11)的第一导体板(6)的窗状接收开口(8)中,并且分别 结合到导体(4)。 电路板的一些电连接处于覆盖第一导体板(6)的第二导体板(7)中,并且设置有另外的导体层(12)并封闭接收开口(8)。 单个导体层(5,9至12)通过电镀穿通连接孔和/或盲孔(14,14',15)电连接。

    A STRIPLINE ARRANGEMENT AND A METHOD FOR PRODUCTION THEREOF
    129.
    发明授权
    A STRIPLINE ARRANGEMENT AND A METHOD FOR PRODUCTION THEREOF 有权
    带状线安排及其制备方法

    公开(公告)号:EP1820235B1

    公开(公告)日:2008-07-23

    申请号:EP04809026.0

    申请日:2004-12-01

    Abstract: The present invention relates to a stripline arrangement (10’) comprising a number of stripline layers each comprising a laminate layer (1A, 1B) and conducting layers (2A, 2B, 3A, 3B) provided on each of said laminate layers (1A, 1B), said conducting layers (2A, 2B, 3A, 3B) each comprising a conductive pattern, RF signal (microwave) input and output ports respectively, and an interconnecting arrangement (5) for interconnecting said layers. At least two of said stripline layers are arranged such that a given overlapping zone (L’) is provided between each other facing conducting layers (2A, 2B) of said striplines layers, said interconnecting arrangement (5) comprising a bonding arrangement provided between adjacent and one another facing and overlapping conducting layers (2A, 2B). Connectors (4A, 4B) are provided substantially perpendicularly with respect to an extension plane of the respective stripline layers and crossing said laminate layers (1A, 1B) and conducting layers for, in said overlapping zone, providing contact between the adjacent conducting layers of adjacent stripline layers.

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