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公开(公告)号：KR1019920004963B1
公开(公告)日：1992-06-22
申请号：KR1019880017969
申请日：1988-12-30
IPC: H01L21/20
Abstract: The gas supply system is used for forming SiO2 or SiOxNy insulating thin film on Si or GaAs base in the process of manufacturing semiconducting elements by using the photo-chemical vapor deposition. And the system safely supplies the raw material and the surrounding gases, i.e. nitrogen oxide, oxygen, ammonia, argon and SiH4, to the deposition reactor. The gas supply system comprises the raw material gas lines having a manually operated valve (9), a bulk head union (10), a check valve (11), a pneumatic valve (12) sequentially provided; a main line (1) having a pneumatic valve (5) and a bellows (23); a nitrogen inducing line (13) connected between the nitrogen and the SiH4 supply line; an air line having a solenoid valve.
Abstract translation: 在使用光化学气相沉积制造半导体元件的过程中，气体供给系统用于在Si或GaAs基底上形成SiO2或SiOxNy绝缘薄膜。 并且该系统将原料和周围的气体即氮氧化物，氧气，氨，氩气和SiH4安全地供应到沉积反应器。 气体供给系统包括原料气体管线，其具有手动操作的阀（9），散装头联接件（10），止回阀（11），依次设置的气动阀（12） 具有气动阀（5）和波纹管（23）的主管线（1）; 连接在氮气和SiH4供应管线之间的氮气诱导管线（13） 具有电磁阀的空气管路。
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Patent Agency Ranking
公开(公告)号：KR100298195B1
公开(公告)日：2001-11-26
申请号：KR1019980045265
申请日：1998-10-28
Applicant: 한국전자통신연구원
IPC: H01L21/82
Abstract: 본 발명은 콜렉터 상층구조 Npn 이종접합 쌍극자 트랜지스터의 멀티-콜렉터에서 콜렉터 간의 전기적 분리를 절연막에 의해 이루어지도록 하므로써 멀티-콜렉터의 분리 특성을 개선하여, 전류이득이 크고, 평탄화된 구조를 갖도록 하고, 쌍극자 트랜지스터의 베이스 저항을 낮추고, 베이스-콜렉터 접합의 파괴전압을 증가시킬 수 있는 I
2 L 소자 제조방법을 제공하고자 하는 것으로, 본 발명은 첫째, 멀티-콜렉터에서 콜렉터 간의 전기적 분리를 절연막에 의해 이루어지도록 하여 멀티-콜렉터의 분리 특성을 개선할 수 있고, 둘째, 콜렉터 상층구조 Npn 이종접합 쌍극자 트랜지스터의 에미터층까지 깊게, 그리고 수평으로 형성된 콜렉터 및 에미터 영역을 갖도록 pnp 쌍극자 트랜지스터를 형성할수 있어, 단면적이 증가하므로 전류이득을 증가시킬수 있게 하고 , 세째, 입력전극 및 출력전극과 더불어 접지전극이 기판의 동일한 일면에 형성되도록 하여 완전한 평탄화를 이룰수 있으며, 네째, 수평 pnp 쌍극자 트랜지스터의 베이스가 콜렉터 상층구조 npn 이종접합 쌍극자 트랜지스터의 콜렉터층이 아닌 별도의 에피층에 형성되도록 하여 수평 pnp 쌍극자 트랜지스터의 베이스 영역의 n형 불순물 도핑농도를 최적화하여, 수평 pnp 쌍극자 트랜지스터의 베이스 영역의 저항을 낮추고, 베이스-콜렉터 접합의 파괴전압 및 전류이득을 증가시킨다.-
公开(公告)号：KR100299665B1
公开(公告)日：2001-11-22
申请号：KR1019970069556
申请日：1997-12-17
Applicant: 한국전자통신연구원
IPC: H01L29/737
Abstract: PURPOSE: A method for forming an ohmic contact layer of a hetero-junction bipolar transistor is provided to improve efficiency of a fabricating process and reduce a fabricating cost by forming simultaneously ohmic electrodes on an emitter, a base, and a collector. CONSTITUTION: A buffer layer, a sub-collector layer, a collector layer, a base layer, an emitter layer, and an emitter cap layer are grown on a compound semiconductor substrate. A surface of the base layer is exposed by etching the emitter cap layer and the emitter layer. A surface of the sub-collector layer is exposed by patterning the base layer and the collector layer. An ohmic electrode is formed simultaneously on an emitter region, a base region, and a collector region. A Ti metal layer(8), a Ti nitride metal layer, a compositionally graded tungsten nitride metal layer, and a tungsten metal layer are deposited sequentially on the substrate. A titanium metal layer(8) and a platinum metal layer are formed thereon. An n type emitter and an n type collector ohmic electrode and a p type base ohmic electrode are formed simultaneously by performing an etch process. An isolation region is formed by performing a mesa etch process. A dielectric insulating layer(17) is applied on a whole surface of the above structure. A metal line including the titanium layer and an aurum layer(18) is formed by performing selectively the etch process.
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公开(公告)号：KR1020010076795A
公开(公告)日：2001-08-16
申请号：KR1020000004154
申请日：2000-01-28
IPC: H01L29/737
Abstract: PURPOSE: A method is provided to fabricate an emitter enhancement heterojunction bipolar transistor and a varactor diode with a low leakage current on the same plane by etching a compound semiconductor epi layer and a regrown N+/N-/N+ compound semiconductor epi layer. CONSTITUTION: According to the method, a sub collector layer(22), a collector layer(23), a base layer(24), an emitter layer(25) and an emitter cap layer(26) of a heterojunction bipolar transistor are grown on a semi-insulating compound semiconductor substrate(21). The emitter cap layer and the emitter layer of the heterojunction bipolar transistor are etched, and after an insulation film(27) is deposited on the whole wafer, the insulation film on a region where a varactor diode is to be formed is etched. An N+ compound semiconductor epi layer(28), an N- compound semiconductor epi layer(29) and an N+ compound semiconductor epi layer(30) are continuously regrown, and the compound semiconductor layer regrown on the insulation film is etched. And an ohmic bottom electrode(34) region of the varactor diode is formed by etching a part of the regrown N+/N-/N+ compound semiconductor epi layer. The base layer and the collector layer of the emitter enhancement heterojunction bipolar transistor are etched. And, an emitter electrode(31), a base electrode(32) and a collector electrode(33) of the heterojunction bipolar transistor are formed in sequence by a lift-off method.
Abstract translation: 目的：通过蚀刻化合物半导体外延层和再生长的N + / N / N +化合物半导体外延层，提供了在同一平面上制造发射极增强异质结双极晶体管和具有低漏电流的变容二极管的方法。 构成：根据该方法，生长异相双极晶体管的副集电极层（22），集电极层（23），基极层（24），发射极层（25）和发射极盖层（26） 在半绝缘化合物半导体衬底（21）上。 蚀刻异质结双极晶体管的发射极帽层和发射极层，并且在整个晶片上沉积绝缘膜（27）之后，蚀刻在要形成变容二极管的区域上的绝缘膜。 将N +化合物半导体外延层（28），N-化合物半导体外延层（29）和N +化合物半导体外延层（30）连续重新生长，并且蚀刻在绝缘膜上再生长的化合物半导体层。 并且通过蚀刻一部分再生长的N + / N / N +化合物半导体外延层来形成变容二极管的欧姆底部电极（34）区域。 蚀刻发射极增强异质结双极晶体管的基极层和集电极层。 并且，通过剥离方法依次形成异质结双极晶体管的发射电极（31），基极（32）和集电极（33）。
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公开(公告)号：KR1020010076080A
公开(公告)日：2001-08-11
申请号：KR1020000003494
申请日：2000-01-25
Applicant: 한국전자통신연구원
IPC: H01L29/737
Abstract: PURPOSE: A heterojunction bipolar transistor and a method for manufacturing the heterojunction bipolar transistor are provided to improve high speed characteristic of the device by removing parasitic effect between emitters and bases. CONSTITUTION: The heterojunction bipolar transistor manufacturing method includes following steps. At first, a cushion layer, an auxiliary collector layer, a base layer, an emitter layer and an emitter cap layer are sequentially grown to form an HBT(heterojunction bipolar transistor) epi-structure on a semiconductor substrate. Then, a 3-layer metallic layer(18) is vaporized on the portion of the HBT epi-structure to form an emitter ohmic contact. At third, overall emitter cap layer and a portion of the emitter layer is etched by using the 3-layer metallic layer as a mask and a thin emitter layer remains. Then, the emitter layer is removed by a base electrode pattern and a base electrode is formed. At fifth, the emitter layer, base layer and the collector layer are etched to form a collector electrode on the auxiliary collector layer to define a device isolation region. Then, each electrodes is wired to form the device.
Abstract translation: 目的：提供异质结双极晶体管和制造异质结双极晶体管的方法，以通过去除发射极和基极之间的寄生效应来改善器件的高速特性。 构成：异质结双极晶体管制造方法包括以下步骤。 首先，依次生长缓冲层，辅助集电极层，基极层，发射极层和发射极覆盖层，以在半导体衬底上形成HBT（异质结双极晶体管）外延结构。 然后，在HBT外延结构的部分上蒸发3层金属层（18）以形成发射极欧姆接触。 第三，通过使用3层金属层作为掩模蚀刻整个发射极帽层和发射极层的一部分，并且残留有薄的发射极层。 然后，通过基极图案除去发射极层，形成基极。 第五，蚀刻发射极层，基极层和集电极层，以在辅助集电极层上形成集电极，以限定器件隔离区域。 然后，每个电极被连接以形成该装置。
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公开(公告)号：KR1020010058250A
公开(公告)日：2001-07-05
申请号：KR1019990062466
申请日：1999-12-27
IPC: H01L29/737
Abstract: PURPOSE: A method for manufacturing a heterojunction bipolar transistor(HBT) is provided to effectively cope with a problem of generation of a surface reunion current in the outside base region significantly affecting an electric characteristic of the HBT device. CONSTITUTION: A method for manufacturing a heterojunction bipolar transistor(HBT) prepares a HBT epitaxial substrate(1). An emitter region and a base region of the HBT epitaxial substrate are defined. A photosensitive film and a dielectric thin film grown at low temperature are formed on the HBT epitaxial substrate and are experienced by twice plasma etching to form a surface projection for lifting off metal. A resistant-heat ohmic electrode is formed on the surface of the emitter and base regions. An AlGaAs depletion layer(14) is again grown on the surface of the base using the ohmic electrode as a mask layer. A collector electrode is formed on the resulting surface. Separation between the devices is performed to produce a unit HBT.
Abstract translation: 目的：提供一种用于制造异质结双极晶体管（HBT）的方法，以有效地解决在外部基极区域产生表面团聚电流的问题，其显着影响HBT器件的电特性。 构成：用于制造异质结双极晶体管（HBT）的方法制备HBT外延衬底（1）。 定义HBT外延衬底的发射极区域和基极区域。 在HBT外延基板上形成感光膜和在低温下生长的电介质薄膜，并通过两次等离子体蚀刻来形成用于剥离金属的表面投影。 在发射极和基极区域的表面上形成耐热欧姆电极。 使用欧姆电极作为掩模层，再次在基底的表面上生长AlGaAs耗尽层（14）。 在所得表面上形成集电极。 执行器件之间的分离以产生HBT单元。
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