公开(公告)号：JPH0271508A

公开(公告)日：1990-03-12

申请号：JP22225388

申请日：1988-09-07

Applicant: CANON KK

Inventor： TERAJIMA SHIGERU ,  EBINUMA RYUICHI ,  AMAMIYA MITSUAKI ,  OZAWA KUNITAKA ,  UDA KOJI ,  SHIMODA ISAMU ,  UZAWA SHUNICHI

IPC: G21K5/02 ,  G03F7/20 ,  H01L21/027 ,  H01L21/30

Abstract: PURPOSE:To make exposure amount uniform by a constitution wherein an integral exposure amount is calculated on the basis of a measured result of an illuminance of exposed light by using a sensor and the integral exposure amount is transmitted to a shutter control part as an information signal. CONSTITUTION:When an exposure illuminance and an exposure amount are measured, a stage 103 is moved; a sensor 104 for illuminance measurement use is shifted to an arbitrary point inside an exposure region; a movable aperture 105 is moved by using an installed means; X rays ar directed. An area of a shaded part indication an output result of the sensor 104 during this process indicates an integral exposure amount at the point; it is judged whether the amount is proper or not by comparing this value with a preset exposure amount. A measurement and a judgment in this manner are executed in arbitrary N points within the exposure regain; when the proper exposure amount is obtained by the measurement in all positions, a wafer is exposed to light. If there exists an improper point, it is fed back to a control part of the movable aperture; a shifting velocity of the movable aperture is corrected in order to obtain the proper exposure amount at arbitrary points inside the exposure region. Thereby, a whole region of the wafer is exposed to light at a uniform exposure amount.

公开(公告)号：JPH0267714A

公开(公告)日：1990-03-07

申请号：JP21852088

申请日：1988-09-02

Applicant: CANON KK

Inventor： MORI TETSUZO ,  SAKAMOTO EIJI ,  HARA SHINICHI ,  UDA KOJI ,  SHIMODA ISAMU ,  UZAWA SHUNICHI

IPC: G03F7/20 ,  H01L21/027 ,  H01L21/30

Abstract: PURPOSE:To inhibit the temperature rise of a wafer at the time of exposure at an allowable temperature or lower without causing a reduction of a pattern formation accuracy due to the fluctuation of a flow by a method wherein a flow rate control means is provided on a medium passage and this flow rate control means is actuated while being controlled according to a state of exposure. CONSTITUTION:A cooling medium is sent out through a temperature control pump 9, is put in a wafer chuck 5 through an entrance 13, absorbs the heat of the chuck 5 and the water 4, and is exhausted through an exit 12. The exhausted medium is subjected to temperature control and repeats a circulation. An exposure control part 11 sends an exposure state signal to show whether a device is in exposure or not to a flow rate control part 10. The control part 10 makes a flow rate control valve 7 operate while controlling the valve 7 in two stages according to whether the device is in exposure or not. That is, at the time of exposure, a fluctuation to be given to the chuck 5 is set at a flow rate A which does not affect a pattern formation accuracy and at the time of non exposure, the fluctuation is set at a sufficient flow rate B that the temperature rise of a wafer due to the storage of an energy imparted by an exposure up to the time of non exposure does not exceed an allowable temperature range. The control part 11 further performs the control of a light source 1, the control of opening and shutting of a shutter 2 and the control of movement of a stage 6 for positioning use according to a set sequence program.

公开(公告)号：JPS63269524A

公开(公告)日：1988-11-07

申请号：JP10302887

申请日：1987-04-28

Applicant: CANON KK

Inventor： OKUNUKI MASAHIKO ,  SHIMODA ISAMU ,  MIYAWAKI MAMORU ,  TSUKAMOTO TAKEO ,  SUZUKI AKIRA ,  KANEKO TETSUYA ,  TAKEDA TOSHIHIKO ,  SEKI MITSUAKI

IPC: H01J37/305 ,  G11B9/10 ,  H01L21/027 ,  H01L21/30 ,  H01L21/68

Abstract: PURPOSE:To increase a processing speed and to accurately correct a direction of a beam for individual charged particle beam generation sources by deflecting the charged particle beam generated by the plural charged particle beam generation sources independently of one another on the basis of data from a data source. CONSTITUTION:While each EB source is deflected in an X-direction by its X-direction deflecting electrodes X1, X2 and continues a drawing operation in the X-direction within a range to be covered by a deflection on the basis of the drawing information from memories MU, ML, a wafer WF and a head MB are continuously shifted relatively in a Y-direction. By this setup, all pixels in the Y-direction in a 1/2 region are drawn. Because a Y-direction shift operation is continuous, a deviation which is caused druing the Y-direction drawing operation for each pixel in the Y-direction is corrected by using Y-direction deflecting electrodes Y1, Y2. If this drawing operation is repeated while the wafer WF and the head MB are intermittently shifted relatively in the X- direction, one chip row in the Y-direction is drawn. Because each EB source draws one chip row in the Y-direction of the wafer WF simultaneously, the high-speed drawing operation is realized.

公开(公告)号：JPS63269521A

公开(公告)日：1988-11-07

申请号：JP10302287

申请日：1987-04-28

Applicant: CANON KK

Inventor： MIYAWAKI MAMORU ,  SHIMODA ISAMU ,  SUZUKI AKIRA ,  KANEKO TETSUYA ,  TSUKAMOTO TAKEO ,  TAKEDA TOSHIHIKO ,  OKUNUKI MASAHIKO

IPC: H01J37/06 ,  H01J37/305 ,  H01L21/027 ,  H01L21/30

Abstract: PURPOSE:To increase a drawing speed and to make a fine change of a drawing size by a method wherein two or more electron sources are arranged unidimensionally at prescribed intervals and an object where a pattern is to be drawn is shifted relatively at a prescribed angle with reference to an electron source row. CONSTITUTION:Electron sources 2 are arranged in such a way that, when a wafer 1 is shifted in an X-axis direction at uniform speed, an angle formed by a unidimensionally arranged direction of the electron sources 2 with reference to the X-axis direction, i.e. a moving direction of the wafer 1 is theta. This angle theta is theta=sin (d/ D) if a width of an electron discharge region of the electron sources 2 is d and an interval between the individual electron sources is D. A pattern is formed in such a way that an electron is emitted from the individual electron sources 2 while the wafer 1 is being shifted in this manner. If the time when a picture element 25 reaches a part directly under an electron emission part EB3 is designated as t5, a pattern P is drawn by emitting the electron from an EB1 during the time t1-t3, from an EB2 at the time t4 and from an EB3 at the time t5. If the angle theta is set at a value thetaM=sin (d/kD) which is smaller than sin (d/D) (where k>1), it is possible to magnify the pattern k times without isolating individual dots by changing the angle theta from thetaM to, e.g., thetaL=sin (d/D).

公开(公告)号：JPS63269520A

公开(公告)日：1988-11-07

申请号：JP10302187

申请日：1987-04-28

Applicant: CANON KK

Inventor： MIYAWAKI MAMORU ,  SHIMODA ISAMU ,  SUZUKI AKIRA ,  KANEKO TETSUYA ,  TSUKAMOTO TAKEO ,  TAKEDA TOSHIHIKO ,  OKUNUKI MASAHIKO

IPC: H01J37/06 ,  H01J37/305 ,  H01L21/027 ,  H01L21/30

Abstract: PURPOSE:To increase a drawing speed by a method wherein an object whose pattern is drawn by an electron beam radiated by an electron source of an electron source row where two or more electron sources are arranged unidimensionally at prescribed intervals is shifted relatively at a prescribed angle with reference to the electron beam row. CONSTITUTION:When a reverse voltage is impressed between a p -Si substrate 10 and an n-type Si layer 9 installed on the substrate via an electrode 12 and electrodes 11, an electron whose energy is higher than in a state of thermal equilibrium is generated. If a voltage of an electrode 15 installed on the n-side layer 9 via an SiO2 layer 14 is set to be higher than a voltage to be impressed on the electrodes 11, the high-energy electron generated in an n-type region passes through a low work-function material installed at electron emission parts 16 and is emitted into a vacuum. Because individual elements 13 are isolated by grooves 13, it is possible to drive the individual elements by using the voltage impressed on the electrodes 11. Accordingly, an angle theta which is formed by a moving direction of a wafer 1 and a unidimensionally arranged direction of electron sources 2 is 1.43 deg. from an equation theta=Sin (d/kD), where a width of an electron emission region of the electron sources 2 is d, an interval between the individual electron sources is D and k>=1. This angle is set by controlling a pulse motor PM and by turning the electron sources at a prescribed angle on the basis of the measuring information of a rotary encoder.

公开(公告)号：JPS63269446A

公开(公告)日：1988-11-07

申请号：JP10303287

申请日：1987-04-28

Applicant: CANON KK

Inventor： OKUNUKI MASAHIKO ,  SHIMODA ISAMU ,  MIYAWAKI MAMORU ,  TSUKAMOTO TAKEO ,  SUZUKI AKIRA ,  KANEKO TETSUYA ,  TAKEDA TOSHIHIKO ,  SEKI MITSUAKI

IPC: H01J37/06 ,  G11B9/10 ,  H01J37/147 ,  H01J37/305 ,  H01L21/027 ,  H01L21/30 ,  H01L21/66

Abstract: PURPOSE:To produce the apparatus in the caption with a compact size and high accuracy by providing one each or more of several kinds of charged beam radiation means having mutually different sizes on a single board. CONSTITUTION:An electron beam (EB) radiation head MB is mounted on and absorbed to a stage MS and the head MB as a single board comprises EB radiation sources ES0-ES15. The EB radiation source ES0 and ES15 are for registet only, the EB radiation sources ES1-ES14 are for exposure only or also for registet. The EB radiation sources ES1-ES14, here, one pair of them are assigned to draw up each chip row in X-direction of a wafer WF. For example, CP1U upper half area of a chip (exposed area) CP1 is drawn up by the EB radiation source ES1 and lower half area CP1L is drawn up by the EB radiation source ES2. And also each of upper half parts of exposed areas CP2-CP5 is drawn by the EB radiation source ES1, and each of the lower half parts thereof is drawn by the EB radiation source ES2. Accordingly, the apparatus in the caption can be produced in a compact size and high accuracy.

公开(公告)号：JPS63237340A

公开(公告)日：1988-10-03

申请号：JP7046787

申请日：1987-03-26

Applicant: CANON KK

Inventor： TSUKAMOTO TAKEO ,  SUZUKI AKIRA ,  SHIMODA ISAMU ,  KANEKO TETSUYA ,  TAKEDA TOSHIHIKO ,  YONEHARA TAKAO ,  ICHIKAWA TAKESHI ,  OKUNUKI MASAHIKO

IPC: H01J9/02 ,  H01J1/30 ,  H01J29/04 ,  H01J31/12 ,  H01J31/15

Abstract: PURPOSE:To obtain a device that can be made plane with electric field effect type electron emitting elements by illuminating a fluorescent section with electrons emitted from electrodes having peak sections. CONSTITUTION:Multiple core type bases 2 are formed on an oxidized substrate 1, monocrystals are grown centering its single core, and an electrode 7 with the desired size and having a nearly conical peak section is formed to obtain an electron emitting section. R, G, B phosphors are coated on the electrode 7 in three columns by three lines to form a unit fluorescent region 9, many fluorescent regions are provided on a fluorescent section 8, and each region 9 faces the electrode 7. 0V is applied in sequence to wirings 101-104 in line, transistors are connected to matrix-shaped extracting electrodes 31-34 for each wiring, the voltage is applied at the desired timing, and electrons are emitted from an optional electrode. These emitted electrons pass the center of electrodes 41, 43 and 42, 44 and are radiated to the region 9. At this time, electrons are deflected and controlled in the Y direction and the X direction.

公开(公告)号：JPS63221528A

公开(公告)日：1988-09-14

申请号：JP5211387

申请日：1987-03-09

Applicant: CANON KK

Inventor： TAKEDA TOSHIHIKO ,  SUZUKI AKIRA ,  SHIMODA ISAMU ,  KANEKO TETSUYA ,  TSUKAMOTO TAKEO ,  YONEHARA TAKAO ,  ICHIKAWA TAKESHI ,  OKUNUKI MASAHIKO

IPC: H01J1/304 ,  H01J1/30

Abstract: PURPOSE:To improve the heat resistance of an electrode by providing a heat- resistant conductive film on a conductive member with a peak section and forming an electrode with a peak section on it. CONSTITUTION:An insulating layer 2 made of a-SiO2 or the like is formed on a substrate 1 made of Si or the like, and a recess 7 is formed by the hot etching or the like. A core forming base 3 made of Si, Si3N4, etc., is formed on the bottom face 7a of the recess 7 serving as an deposit face. A monocrystal of Si or the like is grown on it centering a core, and a conductive member 4 with a peak section is formed. A heat-resistant conductive film is formed on it, and an electrode 8 with a peak section is provided. Both a semiconductor and a conductor which can feed a fixed current may be used as the material for the conductive member 4. For example, W, LaBe, etc., are used to form a film 5 by the CVD method. An extracting electrode 6 is formed near the electrode 8 on the insulating layer 2.

公开(公告)号：JPS63187541A

公开(公告)日：1988-08-03

申请号：JP1614987

申请日：1987-01-28

Applicant: CANON KK

Inventor： TSUKAMOTO TAKEO ,  SHIMIZU AKIRA ,  SUZUKI AKIRA ,  SUGATA MASAO ,  SHIMODA ISAMU ,  OKUNUKI MASAHIKO

IPC: H01J37/073 ,  H01J1/308 ,  H01L21/027 ,  H01L21/30 ,  H01L29/74

Abstract: PURPOSE:To control the electron emission quantity efficiently and stably by controlling the driving current of an electron emitting element with a trigger signal. CONSTITUTION:When a trigger signal T is applied between an N layer 1 and a P layer 2 when a P layer 4 has a higher potential than the N layer 1, a current is fed to an electron emitting element, electrons flow into the P layer 4, and electrons are emitted from the surface of a low-work function material film 6. Therefore, when the driving current is controlled so that the trigger signal T is generated in the desired phase of the AC voltage, the time integration value of the driving current can be set to the desired value. That is, the electron emission quantity is expressed by (i)=etaI, where I is the driving current flowing through an electron emitting element 11, and eta is the electron emission efficiency. When the time integration value of the driving current I is changed, the time integration value of the electron emission quantity (i) can be controlled highly accurately and efficiently.

公开(公告)号：JPS63187535A

公开(公告)日：1988-08-03

申请号：JP1614787

申请日：1987-01-28

Applicant: CANON KK

Inventor： TSUKAMOTO TAKEO ,  SHIMIZU AKIRA ,  SUZUKI AKIRA ,  SUGATA MASAO ,  SHIMODA ISAMU ,  OKUNUKI MASAHIKO

IPC: H01J19/24

Abstract: PURPOSE:To prevent malfunction by forming a plate electrode via an insulating layer provided with an electron emitting port on the electron emitting section of an electron emitting element. CONSTITUTION:A plate electrode is formed via an insulating layer provided with an electron emitting port on the electron emitting section of an electron emitting element connecting a work function reduction material region to the P-type semiconductor region of the electron emission side. For example, an electrode 7 such as Al is formed on an insulating layer 6, a grid electrode 9 such as Al, poly Si is formed via an insulating layer 9 such as SiO2, and a plate electrode 11 such as Al is formed on this grid electrode 9 via an insulating layer 10 such as SiO2. An electrode 1 is formed on the opposite side to an N-type Si substrate 2 via an ohmic contact layer. Accordingly, no electron is moved in a solid dissimilarly to a semiconductor element, thus a high-speed response device can be obtained.