公开(公告)号：ZA9500605B

公开(公告)日：1995-12-20

申请号：ZA9500605

申请日：1995-01-25

Applicant: QUALCOMM INC

Inventor： WILSON NATHANIEL B ,  BLACK PETER J ,  PETERZELL PAUL E

IPC: H03G3/20 ,  H03D3/00 ,  H03D3/24 ,  H03D7/16 ,  H03G3/30 ,  H04B1/30 ,  H04L27/14 ,  H04L27/22 ,  H03G ,  H03D

CPC classification number: H03D7/165 ,  H03D3/002 ,  H03D3/008 ,  H03D2200/0025 ,  H03D2200/0047 ,  H03D2200/005 ,  H03D2200/0052 ,  H03G3/3052 ,  H03G3/3089

公开(公告)号：AU2398995A

公开(公告)日：1995-11-29

申请号：AU2398995

申请日：1995-04-28

Applicant: QUALCOMM INC

Inventor： WILSON NATHANIEL B ,  BLACK PETER J ,  PETERZELL PAUL E

IPC: H03G3/20 ,  H03D3/00 ,  H03D3/24 ,  H03D7/16 ,  H03G3/30 ,  H04B1/30 ,  H04L27/14 ,  H04L27/22

Abstract: An automatic gain control (AGC) and D.C. offset correction method and apparatus for controlling signal power of a received RF signal within a dual mode quadrature receiver is disclosed herein. In a preferred implementation the automatic gain control apparatus may be adjusted to provide a desired control response to various fading characteristics of a received FM, FSK, GMSK, QPSK, or BPSK signal. The AGC apparatus includes an adjustable gain amplifier having an input port for receiving an input signal, a control port for receiving a gain control signal, and an output port for providing an output signal. A quadrature downconverter coupled to the output port serves to translate the frequency of the output signal to a baseband frequency, thereby producing baseband signals. In a preferred implementation the downconverter is operative to map the carrier frequency of the output signal to a baseband frequency offset by a predetermined margin from D.C. Two high gain active lowpass filters provide out-of-band signal rejection for the baseband signals. A D.C. feedthrough suppression loop, disposed to receive said baseband signal, suppresses D.C. offsets produced by the downconverter and lowpass filters, hence providing a compensated baseband signal. The AGC apparatus is further disposed to generate a received power signal based on the power of the output signal. A saturating integrator compares the received power signal to a reference signal and produces the gain control signal by integrating or by refraining from integration based on values of the reference, received power signal, and gain control signals, thereby extending the usable dynamic range of the receiver for FM mode.

公开(公告)号：CA2723046C

公开(公告)日：2013-02-19

申请号：CA2723046

申请日：2002-02-15

Applicant: QUALCOMM INC

Inventor： LI TAO ,  HOLENSTEIN CHRISTIAN ,  KANG INYUP ,  WALKER BRETT C ,  PETERZELL PAUL E ,  CHALLA RAGHU ,  SEVERSON MATTHEW L ,  RAGHUPATHY ARUN ,  SIH GILBERT C

IPC: H03G1/00 ,  H04B1/16 ,  H03G3/00 ,  H03G3/20 ,  H03G3/30 ,  H04B1/30 ,  H04J13/00 ,  H04L27/22 ,  H04L27/38

Abstract: A direct downconversion receiver architecture having a DC loop to remove DC offset from the signal components, a digital variable gain amplifier (DVGA) to provide a range of gains, an automatic gain control (AGC) loop to provide gain control for the DVGA and RF/analog circuitry, and a serial bus interface (SBI) unit to provide controls for the RF/analog circuitry via a serial bus. The DVGA may be advantageously designed and located as described herein. The operating mode of the VGA loop may be selected based on the operating mode of the DC loop, since these two loops interact with one another. The duration of time the DC loop is operated in an acquisition mode may be selected to be inversely proportional to the DC loop bandwidth in the acquisition mode. The controls for some or all of the RF/analog circuitry may be provided via the serial bus.

公开(公告)号：CA2438333C

公开(公告)日：2011-11-01

申请号：CA2438333

申请日：2002-02-15

Applicant: QUALCOMM INC

Inventor： LI TAO ,  HOLENSTEIN CHRISTIAN ,  KANG INYUP ,  WALKER BRETT C ,  PETERZELL PAUL E ,  CHALLA RAGHU ,  SEVERSON MATTHEW L ,  RAGHUPATHY ARUN ,  SIH GILBERT CHRISTOPHER

IPC: H03G1/00 ,  H03G3/20 ,  H03F3/68 ,  H03G3/30 ,  H04L27/22 ,  H04L27/38

Abstract: A direct downconversion receiver architecture having a DC loop to remove DC offset from the signal components, a digital variable gain amplifier (DVGA) to provide a range of gains, an automatic gain control (AGC) loop to provide gain control for the DVGA and RF/analog circuitry, and a serial bus interface (SBI) unit to provide controls for the RF/analog circuitry via a serial bus. The DVGA may be advantageously designed and located as described herein. The operating mode of the VGA loop may be selected based on the operating mode of the DC loop, since these two loops interact with one another. The duration of time the DC loop is operated in an acquisition mode may be selected to be inversely proportional to the DC loop bandwidth in the acquisition mode. The controls for some or all of the RF/analog circuitry may be provided via the serial bus.

公开(公告)号：FI118662B

公开(公告)日：2008-01-31

申请号：FI20060862

申请日：2006-09-27

Applicant: QUALCOMM INC

Inventor： WHEATLEY III CHARLES E ,  KORNFELD RICHARD K ,  PETERZELL PAUL E ,  WEILAND ANA L

IPC: H04B1/06 ,  H04B1/10 ,  H03G1/00 ,  H03G3/30 ,  H04B20060101 ,  H04B1/16 ,  H04B1/18 ,  H04B1/40 ,  H04B1/7075 ,  H04B1/7097 ,  H04B3/06 ,  H04B7/005 ,  H04B7/26 ,  H04B15/00

Abstract: An apparatus to increase a radio receiver's immunity to radio frequency interference, the radio receiver receiving a signal, the apparatus comprising: a switch (1105) coupled to the received signal, the switch (1105) having an open position and a closed position; a resistance (1101), a first end of the resistance (1101) being coupled to the closed position of the switch (1105) and a second end of the resistance (1101) being coupled to a ground potential; an amplifier (1101) having an input coupled to the open position of the switch (1105), for generating an amplified received signal at an output; a controller coupled to the switch (1105), for switching the switch (1105) to the closed position in response to the received signal exceeding a predetermined power level, said received signal conducting through said switch (1105) and said resistance (1101) to ground potential when said switch (1105) is in said closed position; and said resistance (1101) creating an impedance mismatch at the input to said amplifier (1110) when said switch (1105) is in closed position, thereby reducing the gain contributed by said amplifier (1110).

公开(公告)号：AU2007224396A1

公开(公告)日：2007-11-01

申请号：AU2007224396

申请日：2007-10-15

Applicant: QUALCOMM INC

Inventor： KANG INJUP ,  HOLENSTEIN CHRISTIAN ,  CHALLA RAGHU ,  WALKER BRETT C ,  SIH GILBERT C ,  LI TAO ,  SEVERSON MATTHEW L ,  RAGHUPATHY ARUN ,  PETERZELL PAUL E

IPC: H03G1/00 ,  H03G3/20 ,  H03G3/30 ,  H04L27/22 ,  H04L27/38

Abstract: An apparatus and method in a wireless communication system, the apparatus comprising: first means for amplifying a received signal; means for cancelling a DC offset in the amplified signal; second means for digitally amplifying the DC offset cancelled signal; and means for measuring the digitally amplified signal and to control the gains of the first and second amplifying means.

公开(公告)号：DE69535225T2

公开(公告)日：2007-09-13

申请号：DE69535225

申请日：1995-12-11

Applicant: QUALCOMM INC

Inventor： WHEATLEY CHARLES E ,  PETERZELL PAUL E ,  KORNFELD RICHARD K ,  WEILAND ANA L

IPC: H04B1/06 ,  H04B7/005 ,  H03G1/00 ,  H03G3/20 ,  H03G3/30 ,  H04B20060101 ,  H04B1/10 ,  H04B1/16 ,  H04B1/18 ,  H04B1/40 ,  H04B1/7075 ,  H04B1/7097 ,  H04B3/06 ,  H04B7/26 ,  H04B15/00

Abstract: An apparatus to increase a radio receiver's immunity to radio frequency interference, the radio receiver receiving a signal, the apparatus comprising: a switch (1105) coupled to the received signal, the switch (1105) having an open position and a closed position; a resistance (1101), a first end of the resistance (1101) being coupled to the closed position of the switch (1105) and a second end of the resistance (1101) being coupled to a ground potential; an amplifier (1101) having an input coupled to the open position of the switch (1105), for generating an amplified received signal at an output; a controller coupled to the switch (1105), for switching the switch (1105) to the closed position in response to the received signal exceeding a predetermined power level, said received signal conducting through said switch (1105) and said resistance (1101) to ground potential when said switch (1105) is in said closed position; and said resistance (1101) creating an impedance mismatch at the input to said amplifier (1110) when said switch (1105) is in closed position, thereby reducing the gain contributed by said amplifier (1110).

公开(公告)号：ES2268553T3

公开(公告)日：2007-03-16

申请号：ES04019499

申请日：1995-12-11

Applicant: QUALCOMM INC

Inventor： WHEATLEY CHARLES E ,  PETERZELL PAUL E ,  KORNFELD RICHARD K ,  WEILAND ANA L

IPC: H04B1/06 ,  H04B7/005 ,  H03G1/00 ,  H03G3/20 ,  H03G3/30 ,  H04B20060101 ,  H04B1/10 ,  H04B1/16 ,  H04B1/18 ,  H04B1/40 ,  H04B1/7075 ,  H04B1/7097 ,  H04B3/06 ,  H04B7/26 ,  H04B15/00

Abstract: Procedimiento para el ajuste de ganancia del circuito, presentado el circuito una señal con potencia, comprendiendo el procedimiento las etapas siguientes: variar (1601) la ganancia de circuito una cantidad predeterminada; determinar (1605) una magnitud de un cambio en la potencia de la señal en respuesta a la variación de la ganancia del circuito; y ajustar la ganancia del circuito en respuesta a la magnitud del cambio en la potencia de la señal, comprendiendo la etapa de ajuste las etapas siguientes: reducir (1620) la ganancia del circuito cuando la magnitud del cambio en la potencia de la señal es superior a un umbral predeterminado; y aumentar (1615) la ganancia del circuito cuando la magnitud del cambio en la potencia de la señal es inferior o igual al umbral predeterminado.

公开(公告)号：FI117840B

公开(公告)日：2007-03-15

申请号：FI20050748

申请日：2005-07-13

Applicant: QUALCOMM INC

Inventor： WHEATLEY III CHARLES E ,  KORNFELD RICHARD K ,  PETERZELL PAUL E ,  WEILAND ANA L

IPC: H04B1/06 ,  H04B1/10 ,  H03G1/00 ,  H03G3/30 ,  H04B20060101 ,  H04B1/16 ,  H04B1/18 ,  H04B1/40 ,  H04B1/7075 ,  H04B1/7097 ,  H04B3/06 ,  H04B7/005 ,  H04B7/26 ,  H04B15/00

Abstract: An apparatus to increase a radio receiver's immunity to radio frequency interference, the radio receiver receiving a signal, the apparatus comprising: a switch (1105) coupled to the received signal, the switch (1105) having an open position and a closed position; a resistance (1101), a first end of the resistance (1101) being coupled to the closed position of the switch (1105) and a second end of the resistance (1101) being coupled to a ground potential; an amplifier (1101) having an input coupled to the open position of the switch (1105), for generating an amplified received signal at an output; a controller coupled to the switch (1105), for switching the switch (1105) to the closed position in response to the received signal exceeding a predetermined power level, said received signal conducting through said switch (1105) and said resistance (1101) to ground potential when said switch (1105) is in said closed position; and said resistance (1101) creating an impedance mismatch at the input to said amplifier (1110) when said switch (1105) is in closed position, thereby reducing the gain contributed by said amplifier (1110).

公开(公告)号：DE69535225D1

公开(公告)日：2006-10-26

申请号：DE69535225

申请日：1995-12-11

Applicant: QUALCOMM INC

Inventor： WHEATLEY ,  PETERZELL PAUL E ,  KORNFELD RICHARD K ,  WEILAND ANA L

IPC: H04B1/06 ,  H04B7/005 ,  H03G1/00 ,  H03G3/20 ,  H03G3/30 ,  H04B20060101 ,  H04B1/10 ,  H04B1/16 ,  H04B1/18 ,  H04B1/40 ,  H04B1/7075 ,  H04B1/7097 ,  H04B3/06 ,  H04B7/26 ,  H04B15/00

Abstract: An apparatus to increase a radio receiver's immunity to radio frequency interference, the radio receiver receiving a signal, the apparatus comprising: a switch (1105) coupled to the received signal, the switch (1105) having an open position and a closed position; a resistance (1101), a first end of the resistance (1101) being coupled to the closed position of the switch (1105) and a second end of the resistance (1101) being coupled to a ground potential; an amplifier (1101) having an input coupled to the open position of the switch (1105), for generating an amplified received signal at an output; a controller coupled to the switch (1105), for switching the switch (1105) to the closed position in response to the received signal exceeding a predetermined power level, said received signal conducting through said switch (1105) and said resistance (1101) to ground potential when said switch (1105) is in said closed position; and said resistance (1101) creating an impedance mismatch at the input to said amplifier (1110) when said switch (1105) is in closed position, thereby reducing the gain contributed by said amplifier (1110).