公开(公告)号：US11667524B2

公开(公告)日：2023-06-06

申请号：US17130335

申请日：2020-12-22

Applicant: HYUNDAI KEFICO CORPORATION

Inventor： Jun Hwan Choi ,  Chi Yeon Kim

IPC: B81C1/00 ,  G01L19/06

CPC classification number: B81C1/00357 ,  B81C2201/0133 ,  B81C2201/0176 ,  B81C2201/0178 ,  B81C2201/0195 ,  G01L19/0654

Abstract: Disclose is a method for fabricating a semiconductor device. The method includes: forming a groove such as by etching one side surface of a first substrate; attaching a second substrate including a silicon layer on the etched surface of the first substrate formed with the hollow groove; etching the second substrate so as to leave substantially only the silicon layer; forming a thin film structure on the surface of silicon layers of the second substrate; and separating the second substrate formed with the thin film structure from the first substrate. For example, the groove structure may be formed in the lower portion of the device in the process of fabricating the semiconductor device to facilitate the final device separation.

公开(公告)号：US11667517B2

公开(公告)日：2023-06-06

申请号：US16908243

申请日：2020-06-22

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Chia Liu ,  Chia-Hua Chu ,  Chun-Wen Cheng

IPC: B81B7/00 ,  B81C1/00

CPC classification number: B81B7/0006 ,  B81B7/0051 ,  B81C1/00246 ,  B81B2201/0257 ,  B81B2201/0264 ,  B81B2201/0271 ,  B81C2201/0132 ,  B81C2201/0133 ,  B81C2201/0176 ,  B81C2201/0181 ,  B81C2201/112 ,  B81C2203/0714 ,  B81C2203/0735

Abstract: Representative methods for sealing MEMS devices include depositing insulating material over a substrate, forming conductive vias in a first set of layers of the insulating material, and forming metal structures in a second set of layers of the insulating material. The first and second sets of layers are interleaved in alternation. A dummy insulating layer is provided as an upper-most layer of the first set of layers. Portions of the first and second set of layers are etched to form void regions in the insulating material. A conductive pad is formed on and in a top surface of the insulating material. The void regions are sealed with an encapsulating structure. At least a portion of the encapsulating structure is laterally adjacent the dummy insulating layer, and above a top surface of the conductive pad. An etch is performed to remove at least a portion of the dummy insulating layer.

公开(公告)号：US11644435B2

公开(公告)日：2023-05-09

申请号：US16845565

申请日：2020-04-10

Applicant: SEAGATE TECHNOLOGY LLC

Inventor： ShuaiGang Xiao ,  David S. Kuo ,  Xiaomin Yang ,  Kim Yang Lee ,  Yautzong Hsu ,  Michael R. Feldbaum

IPC: G01R27/08 ,  G01N27/327 ,  G01N33/487 ,  C12Q1/6869 ,  C23C14/00 ,  B01L3/00 ,  G01N27/414 ,  G01N27/447 ,  B82Y5/00

CPC classification number: G01N27/3278 ,  B01L3/502707 ,  B01L3/502715 ,  B01L3/502761 ,  C12Q1/6869 ,  C23C14/00 ,  G01N27/4145 ,  G01N27/4146 ,  G01N27/44791 ,  G01N33/48721 ,  B81C2201/0143 ,  B81C2201/0176 ,  B81C2201/0181 ,  B82Y5/00

Abstract: A DNA sequencing device and methods of making. The device includes a pair of electrodes having a spacing of no greater than about 2 nm, the electrodes being exposed within a nanopore to measure a DNA strand passing through the nanopore. The device can be made by depositing a conductive layer over a sacrificial channel and then removing the sacrificial channel to form the electrode gap.

公开(公告)号：US20180299335A1

公开(公告)日：2018-10-18

申请号：US15753147

申请日：2016-07-08

Applicant: INSTITUTE OF CEOLOGY AND GEOPHYSICS, CHINESE ACADEMY OF SCIENCES

Inventor： Man WONG ,  Kevin CHAU

IPC: G01L1/18 ,  G01B7/16 ,  B81B7/02 ,  B81C1/00

CPC classification number: G01L1/18 ,  B81B7/02 ,  B81B2201/0292 ,  B81B2203/0109 ,  B81B2203/0118 ,  B81B2203/0315 ,  B81C1/00547 ,  B81C2201/0132 ,  B81C2201/0133 ,  B81C2201/0176 ,  G01B7/18 ,  G01B7/20 ,  G01L1/26

Abstract: The present invention is related to a sensor. In particular, the present invention is related to a MEMS strain gauge die and its fabrication process. The MEMS strain gauge die comprises a handle, a device layer and a cap all connected together. A silicon oxide layer is formed between the handle and the device layer. Another silicon oxide layer is formed between the device layer and the cap. Recesses are respectively formed on the handle and the cap and face each other. The handle recess and the cap recess are connected to form a cavity. The device layer, which spans the cavity, further comprises a bridge on which a plurality of piezoresistive sensing elements are formed. The present strain gauge die is more immune to temperature effects. It is especially suitable for operating in a high temperature environment and is capable of delivering accurate and reliable strain measurements at low cost.

公开(公告)号：US10081533B2

公开(公告)日：2018-09-25

申请号：US14448767

申请日：2014-07-31

Applicant: Infineon Technologies AG

Inventor： Ulrich Schmid ,  Tobias Frischmuth ,  Peter Irsigler ,  Thomas Grille ,  Daniel Maurer ,  Ursula Hedenig ,  Markus Kahn ,  Günter Denifl

IPC: B81B3/00 ,  B06B1/02 ,  B81C1/00 ,  H04R19/02 ,  H04R19/04 ,  H04R31/00 ,  H04R7/24 ,  H04R7/02 ,  H04R19/00

CPC classification number: B81B3/0021 ,  B06B1/02 ,  B81B3/007 ,  B81B2201/0257 ,  B81B2201/0264 ,  B81B2203/0109 ,  B81B2203/0118 ,  B81B2203/0127 ,  B81B2203/051 ,  B81C1/00142 ,  B81C1/0015 ,  B81C1/00158 ,  B81C1/00373 ,  B81C2201/0176 ,  B81C2201/0181 ,  B81C2201/019 ,  H04R7/02 ,  H04R7/24 ,  H04R19/005 ,  H04R19/02 ,  H04R19/04 ,  H04R31/00 ,  H04R31/003 ,  H04R2201/003 ,  H04R2307/023 ,  H04R2400/01 ,  H04R2499/11

Abstract: A micromechanical structure includes a substrate and a functional structure arranged at the substrate. The functional structure has a functional region configured to deflect with respect to the substrate responsive to a force acting on the functional region. The functional structure includes a conductive base layer and a functional structure comprising a stiffening structure having a stiffening structure material arranged at the conductive base layer and only partially covering the conductive base layer at the functional region. The stiffening structure material includes a silicon material and at least a carbon material.

公开(公告)号：US20180186625A1

公开(公告)日：2018-07-05

申请号：US15395029

申请日：2016-12-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Simon Joshua JACOBS ,  Molly Nelis SING ,  Kelly Jay TAYLOR

IPC: B81B3/00 ,  B81C1/00

CPC classification number: B81B3/0075 ,  B81B2207/07 ,  B81C1/0038 ,  B81C2201/0132 ,  B81C2201/0176

Abstract: In described examples, a method of forming a microelectromechanical device comprises: forming a first metallic layer comprising a conducting layer on a substrate; forming a first dielectric layer on the first metallic layer, wherein the first dielectric layer comprises one or more individual dielectric layers; forming a sacrificial layer on the first dielectric layer; forming a second dielectric layer on the sacrificial layer; forming a second metallic layer on the second dielectric layer; and removing the sacrificial layer to form a spacing between the second dielectric layer and the first dielectric layer. Removing the sacrificial layer enables movement of the second dielectric layer relative to the first dielectric layer in at least one direction.

公开(公告)号：US09932222B2

公开(公告)日：2018-04-03

申请号：US15162994

申请日：2016-05-24

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Michael T. Brigham ,  Christopher V. Jahnes ,  Cameron E. Luce ,  Jeffrey C. Maling ,  William J. Murphy ,  Anthony K. Stamper ,  Eric J. White

IPC: B81C1/00 ,  G06F17/50 ,  B81B3/00

CPC classification number: B81C1/0015 ,  B81B3/0021 ,  B81B2203/0118 ,  B81B2203/0315 ,  B81B2207/09 ,  B81C1/00047 ,  B81C1/00269 ,  B81C1/00365 ,  B81C1/00531 ,  B81C1/00936 ,  B81C2201/0104 ,  B81C2201/0107 ,  B81C2201/0121 ,  B81C2201/0125 ,  B81C2201/0132 ,  B81C2201/0176 ,  B81C2201/0181 ,  B81C2203/0109 ,  B81C2203/0145 ,  B81C2203/0714 ,  G06F17/5009

Abstract: Micro-Electro-Mechanical System (MEMS) structures, methods of manufacture and design structures are disclosed. The method includes forming a Micro-Electro-Mechanical System (MEMS) beam structure by venting both tungsten material and silicon material above and below the MEMS beam to form an upper cavity above the MEMS beam and a lower cavity structure below the MEMS beam.

公开(公告)号：US20170144883A1

公开(公告)日：2017-05-25

申请号：US15318969

申请日：2014-06-16

Applicant: EPCOS AG ,  Commissariat à l'énergie atomique et aux énergies alternatives

Inventor： Gudrun HENN ,  Marcel GIESEN ,  Arnoldus DEN DEKKER ,  Jean-Louis PORNIN ,  Damien SAINT-PATRICE ,  Bruno REIG

IPC: B81C1/00 ,  B81B7/00

CPC classification number: B81C1/00293 ,  B81B7/0041 ,  B81B2203/0315 ,  B81C2201/0109 ,  B81C2201/013 ,  B81C2201/0176 ,  B81C2203/0136 ,  B81C2203/0145

Abstract: The present invention concerns a microelectronic package (1) comprising a microelectronic structure (2) having at least a first opening (3) and defining a first cavity (4), a capping layer (9) having at least a second opening (10) and defining a second cavity (11) which is connected to the first cavity (4), wherein the capping layer (9) is arranged over the microelectronic structure (2) such that the second opening (10) is arranged over the first opening (3), and a sealing layer (13) covering the second opening (10), thereby sealing the first cavity (4) and the second cavity (11). Moreover, the present invention concerns a method of manufacturing the microelectronic package (1).

公开(公告)号：US09475690B2

公开(公告)日：2016-10-25

申请号：US14283098

申请日：2014-05-20

Applicant: UChicago Argonne, LLC

Inventor： Anirudha V. Sumant ,  Federico Buja ,  Willem Merlijn van Spengen

IPC: H01L21/00 ,  B81B3/00 ,  C23C14/16 ,  B81C1/00

CPC classification number: B81B3/0024 ,  B81B3/0075 ,  B81C1/0038 ,  B81C2201/013 ,  B81C2201/017 ,  B81C2201/0171 ,  B81C2201/0176 ,  C23C14/16

Abstract: Nanocrystalline diamond coatings exhibit stress in nano/micro-electro mechanical systems (MEMS). Doped nanocrstalline diamond coatings exhibit increased stress. A carbide forming metal coating reduces the in-plane stress. In addition, without any metal coating, simply growing UNCD or NCD with thickness in the range of 3-4 micron also reduces in-plane stress significantly. Such coatings can be used in MEMS applications.

Abstract translation: 纳米/微机电系统（MEMS）中的纳米晶金刚石涂层显示出应力。 掺杂的纳米金刚石涂层表现出增加的应力。 碳化物形成金属涂层减少了面内应力。 此外，没有任何金属涂层，简单地生长厚度在3-4微米范围内的UNCD或NCD也显着降低了面内应力。 这种涂层可用于MEMS应用。

公开(公告)号：US20160190245A1

公开(公告)日：2016-06-30

申请号：US14925530

申请日：2015-10-28

Applicant: The University of North Carolina at Chapel Hill

Inventor： James F. Cahoon ,  Joseph D. Christesen ,  Christopher W. Pinion

IPC: H01L29/06 ,  H01L21/306 ,  H01L21/283 ,  B81B3/00 ,  G01Q60/38 ,  H01L29/16 ,  H01L31/028 ,  H01L31/0352 ,  H01L31/09 ,  H01L21/02 ,  B81C1/00

CPC classification number: H01L29/0673 ,  B81B3/0021 ,  B81B2203/0118 ,  B81B2203/0361 ,  B81C1/00111 ,  B81C1/0015 ,  B81C2201/013 ,  B81C2201/0171 ,  B81C2201/0176 ,  G01Q60/38 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02603 ,  H01L21/0262 ,  H01L21/283 ,  H01L21/30604 ,  H01L29/16 ,  H01L31/028 ,  H01L31/035281 ,  H01L31/03529 ,  H01L31/09 ,  Y02E10/50

Abstract: Methods of chemically encoding high-resolution shapes in silicon nanowires during metal nanoparticle catalyzed vapor-liquid-solid growth or vapor-solid-solid growth are provided. In situ phosphorus or boron doping of the silicon nanowires can be controlled during the growth of the silicon nanowires such that high-resolution shapes can be etched along a growth axis on the silicon nanowires. Nanowires with an encoded morphology can have high-resolution shapes with a size resolution of about 1,000 nm to about 10 nm and comprise geometrical shapes, conical profiles, nanogaps and gratings.

Abstract translation: 提供了在金属纳米颗粒催化的气 - 液 - 固 - 固生长或气 - 固 - 固生长期间在硅纳米线中化学编码高分辨率形状的方法。 可以在硅纳米线的生长期间控制硅纳米线的原位磷或硼掺杂，使得可以沿硅纳米线上的生长轴蚀刻高分辨率形状。 具有编码形态的纳米线可以具有约1000nm至约10nm的尺寸分辨率的高分辨率形状，并且包括几何形状，锥形轮廓，纳米光栅和光栅。