公开(公告)号：WO2007076100A3

公开(公告)日：2007-09-07

申请号：PCT/US2006049203

申请日：2006-12-26

Applicant: TESSERA INC ,  HABA BELGACEM ,  TUCKERMAN DAVID B

Inventor： HABA BELGACEM ,  TUCKERMAN DAVID B

IPC: H01L21/58 ,  H01L21/60

CPC classification number: H05K3/4007 ,  H01L2224/16225 ,  H05K3/062 ,  H05K3/4038 ,  H05K3/4647 ,  H05K2201/0361 ,  H05K2201/0367 ,  H05K2203/0384

Abstract: Methods for making a microelectronic component including a plurality of conductive posts (14) extending and projecting away from a flexible substrate (30, 32), wherein at least some of the conductive posts are electrically connected to a plurality of traces (34) exposed on the flexible substrate.

Abstract translation: 用于制造微电子元件的方法，所述微电子元件包括从柔性基板（30,32）延伸并伸出的多个导电柱（14），其中至少一些导电柱电连接到多个暴露于 柔性衬底。

公开(公告)号：WO2007076100A2

公开(公告)日：2007-07-05

申请号：PCT/US2006/049203

申请日：2006-12-26

Applicant: TESSERA, INC. ,  HABA, Belgacem ,  TUCKERMAN, David, B.

Inventor： HABA, Belgacem ,  TUCKERMAN, David, B.

CPC classification number: H05K3/4007 ,  H01L2224/16225 ,  H05K3/062 ,  H05K3/4038 ,  H05K3/4647 ,  H05K2201/0361 ,  H05K2201/0367 ,  H05K2203/0384

Abstract: Methods for making a microelectronic component including a plurality of conductive posts (14) extending and projecting away from a flexible substrate (30, 32), wherein at least some of the conductive posts are electrically connected to a plurality of traces (34) exposed on the flexible substrate.

Abstract translation: 用于制造微电子部件的方法，所述微电子部件包括从柔性基板（30,32）延伸和突出的多个导电柱（14），其中至少一些导电柱电连接到暴露于 柔性基板。

公开(公告)号：WO2004090970A1

公开(公告)日：2004-10-21

申请号：PCT/JP2004/004908

申请日：2004-04-05

Applicant: 大日本印刷株式会社 ,  三浦 陽一

Inventor： 三浦 陽一

IPC: H01L21/60

CPC classification number: H01L24/16 ,  H01L21/4857 ,  H01L2224/11902 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/81191 ,  H01L2224/814 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/3025 ,  H05K3/064 ,  H05K3/205 ,  H05K3/243 ,  H05K3/4007 ,  H05K3/423 ,  H05K3/4682 ,  H05K2201/0361 ,  H05K2201/0367 ,  H05K2201/096 ,  H05K2203/0384 ,  H05K2203/0571 ,  H05K2203/0733 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2224/0401

Abstract: 本発明による配線基板は１層以上の配線層からなる配線部と、配線部の一方側に突出して設けられた第１の端子部と、配線部の他方側に設けられた第２の端子部とを備えている。多層の金属層からなる複合材の表面に第１の端子部用開口を有するレジストを形成し、第１端子部用開口から複合材の第１の金属層のみをエッチングして孔部を形成する。レジストの開口から孔部内に電解めっきを施し、孔部内を電解めっき層で埋めて第１の端子部を形成する。レジストを除去し、複合材に配線層を設け、この配線層上に第２の端子部用開口を有するソルダーレジストを設ける。ソルダーレジストの第２の端子部用開口に電気めっきを施して第２の端子部を形成する。複合材の残部を除去して配線基板を作製する。

Abstract translation: 一种布线板，包括由一个或多个布线层组成的布线部分，从布线部分的一侧突出的第一端子部分和设置在布线部分的另一侧上的第二端子部分。 在由多个金属层组成的复合材料的表面上形成有用于第一端子部分的开口的抗蚀剂，并且仅从第一端子部分的开口蚀刻复合材料的第一金属层，从而形成孔部分。 孔部内部由抗蚀剂的开口进行电镀，孔部填充有电解镀层，形成第一端子部。 随后，除去抗蚀剂，在复合材料上设置布线层，并且在布线层上设置具有用于第二端子部分的开口的阻焊剂。 对阻焊剂中的第二端子部分的开口进行电镀，从而形成第二端子部分。 最后，将复合材料的剩余部分除去，从而生产布线板。

公开(公告)号：WO01047330A1

公开(公告)日：2001-06-28

申请号：PCT/JP2000/009070

申请日：2000-12-21

IPC: H05K1/02 ,  H05K3/06 ,  H05K3/46

CPC classification number: H05K1/0221 ,  H05K3/062 ,  H05K3/4647 ,  H05K2201/0361 ,  H05K2201/09254 ,  H05K2203/0384 ,  H05K2203/0733 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49151 ,  Y10T29/49155 ,  Y10T29/49156

Abstract: A structure of a multilayer printed wiring board having a wiring lead-out port can be easily formed. A large number of products can be easily manufactured with good size reproducibility. A method of manufacturing the same is also are disclosed. The multilayer printed wiring board is characterized by having a signal circuit conductor perfectly covered by an earth circuit in its inside and a wiring lead-out port. A signal circuit conductor having a branch pattern is preferable. The multilayer printed wiring board is manufactured by selectively etching the copper of a cladding sheet manufactured by bonding a copper foil to a nickel foil with 0.1 - 3% draft and forming a signal circuit conductor perfectly covered by an earth circuit and the wiring lead-out port.

Abstract translation: 可以容易地形成具有布线引出口的多层印刷线路板的结构。 可以容易地制造大量的产品，具有良好的尺寸再现性。 还公开了一种制造该方法的方法。 多层印刷电路板的特征在于具有完全被其内部的接地电路覆盖的信号电路导体和布线引出端口。 具有分支图案的信号电路导体是优选的。 多层印刷线路板是通过选择性地蚀刻铜箔而制成的，所述铜包覆片通过将铜箔与0.1〜3％的通气线接合而形成信号电路导体，并且形成完全由接地电路覆盖的信号电路导体和布线引出线 港口。

公开(公告)号：WO00005934A1

公开(公告)日：2000-02-03

申请号：PCT/JP1999/003908

申请日：1999-07-22

IPC: H05K3/06 ,  H05K3/20 ,  H05K3/44 ,  H05K3/46

CPC classification number: H05K3/062 ,  H05K3/20 ,  H05K3/44 ,  H05K3/4647 ,  H05K2201/0355 ,  H05K2201/0361 ,  H05K2201/09554 ,  H05K2203/0384 ,  H05K2203/0733 ,  Y10S428/901 ,  Y10T428/12903 ,  Y10T428/1291 ,  Y10T428/12931 ,  Y10T428/12944 ,  Y10T428/24917

Abstract: A method of manufacturing a multilayered printed-circuit board and a low-cost clad board. Copper foil layers (19, 24, 33) for forming conductor layers (10, 17, 18) and nickel plating layers (20, 21) for forming etch stop layers (11, 12) are alternately stacked and compressed to form a clad board (34) for a printed-circuit board. The clad board (34) for the printed-circuit board is selectively etched to manufacture a base. External conductor layers (15, 16) are formed on the surface of the base and patterned. The conductor layers (10, 15, 16) are interconnected electrically through conductors blocks (17, 18) formed by etching the copper foil layers (19, 24, 33) and the nickel plating layers (20, 21) to complete the manufacture of multilayered printed-circuit board.

Abstract translation: 一种制造多层印刷电路板和低成本复合板的方法。 用于形成用于形成蚀刻停止层（11,12）的导体层（10,17,18）和镀镍层（20,21）的铜箔层（19,24,33）交替堆叠并压缩以形成覆盖板 （34）用于印刷电路板。 选择性地蚀刻用于印刷电路板的复合板（34）以制造基底。 外部导体层（15,16）形成在基底的表面上并被图案化。 导体层（10,15,16）通过蚀刻铜箔层（19,24,33）和镀镍层（20,21）形成的导体块（17,18）电连接，以完成制造 多层印刷电路板。

公开(公告)号：US20170018440A1

公开(公告)日：2017-01-19

申请号：US15282255

申请日：2016-09-30

Applicant: Tessera, Inc.

Inventor： Belgacem Haba ,  Vage Oganesian ,  Kimitaka Endo

IPC: H01L21/48 ,  H01L23/498 ,  H01L25/065 ,  H01L23/538

CPC classification number: H01L21/486 ,  H01L21/4857 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/16 ,  H01L2224/24226 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107 ,  H05K1/185 ,  H05K3/0038 ,  H05K3/4038 ,  H05K3/4647 ,  H05K3/4652 ,  H05K2201/0355 ,  H05K2201/0361 ,  H05K2201/0382 ,  H05K2201/096 ,  H05K2203/0384 ,  H05K2203/0733 ,  H05K2203/1189 ,  H01L2924/00

Abstract: An interconnect element 130 can include a dielectric layer 116 having a top face 116b and a bottom face 116a remote from the top face, a first metal layer defining a plane extending along the bottom face and a second metal layer extending along the top face. One of the first or second metal layers, or both, can include a plurality of conductive traces 132, 134. A plurality of conductive protrusions 112 can extend upwardly from the plane defined by the first metal layer 102 through the dielectric layer 116. The conductive protrusions 112 can have top surfaces 126 at a first height 115 above the first metal layer 132 which may be more than 50% of a height of the dielectric layer. A plurality of conductive vias 128 can extend from the top surfaces 126 of the protrusions 112 to connect the protrusions 112 with the second metal layer.

Abstract translation: 互连元件130可以包括具有顶面116b和远离顶面的底面116a的介电层116，限定沿着底面延伸的平面的第一金属层和沿着顶面延伸的第二金属层。 第一或第二金属层之一或两者可以包括多个导电迹线132,134。多个导电突起112可以从由第一金属层102限定的平面向上延伸穿过电介质层116.导电 突起112可以具有在第一金属层132上方的第一高度115处的顶表面126，其可以超过介电层的高度的50％。 多个导电通孔128可以从突起112的顶表面126延伸，以将突起112与第二金属层连接。

公开(公告)号：US08065797B2

公开(公告)日：2011-11-29

申请号：US11896774

申请日：2007-09-05

Applicant: Ryoichi Watanabe ,  Byoung-Youl Min ,  Je-Gwang Yoo ,  Joon-Sung Kim ,  Seung-Chul Kim ,  Myung-San Kang

Inventor： Ryoichi Watanabe ,  Byoung-Youl Min ,  Je-Gwang Yoo ,  Joon-Sung Kim ,  Seung-Chul Kim ,  Myung-San Kang

IPC: H01K3/10 ,  H05K3/36 ,  H05K3/02 ,  H05K3/10 ,  H05K1/00 ,  H05K1/09

CPC classification number: H05K3/0017 ,  H05K3/0014 ,  H05K3/045 ,  H05K3/06 ,  H05K3/107 ,  H05K3/20 ,  H05K3/205 ,  H05K3/426 ,  H05K3/4614 ,  H05K3/465 ,  H05K3/4658 ,  H05K2201/0361 ,  H05K2201/0376 ,  H05K2201/09036 ,  H05K2201/09563 ,  H05K2203/0278 ,  H05K2203/0384 ,  H05K2203/0582 ,  H05K2203/1152 ,  H05K2203/1189 ,  H05K2203/308 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

Abstract: A method of fabricating a printed circuit board is disclosed. A method of fabricating a printed circuit board that includes: stacking an insulation layer on at least one surface of a core layer, on which an inner circuit is formed, and forming an outer circuit pattern; burying the outer circuit pattern in the insulation layer; removing the outer circuit pattern to form minute grooves and curing the insulation layer; and forming an outer circuit by filling metal in the minute grooves, makes it possible to readily form high-resolution fine-line circuits, as well as to reduce fabrication costs and increase productivity.

Abstract translation: 公开了一种制造印刷电路板的方法。 一种制造印刷电路板的方法，包括：在形成有内部电路的芯层的至少一个表面上堆叠绝缘层，并形成外部电路图案; 将外部电路图案埋在绝缘层中; 去除外部电路图案以形成微小凹槽并固化绝缘层; 通过在金属槽中填充金属而形成外部电路，可以容易地形成高分辨率的细线电路，并且能够降低制造成本并提高生产率。

公开(公告)号：US20090188706A1

公开(公告)日：2009-07-30

申请号：US12317707

申请日：2008-12-23

Applicant: Kimitaka Endo

Inventor： Kimitaka Endo

IPC: H05K1/02 ,  H05K1/11 ,  B32B37/02 ,  B44C1/22

CPC classification number: H01R43/0256 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/13609 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01322 ,  H05K1/185 ,  H05K3/06 ,  H05K3/4007 ,  H05K3/4015 ,  H05K3/4614 ,  H05K2201/0355 ,  H05K2201/0361 ,  H05K2201/10674 ,  H05K2203/0384 ,  H05K2203/0542 ,  H01L2224/05599

Abstract: An interconnection element and method for making same is disclosed. The interconnection element may include a plurality of metal conductors, a plurality of solid metal bumps and a low melting point (LMP) metal layer. The solid metal bumps overly and project in a first direction away from respective ones of the conductors. Each bump has at least one edge bounding the bump in at least a second direction transverse to the first direction. The low melting point (LMP) metal layer has a first face joined to the respective ones of the conductors and bounded in the second direction by at least one edge and a second face joined to the bumps. The edges of the bumps and the LMP layer are aligned in the first direction, and the LMP metal layer has a melting temperature substantially lower than the conductors.

Abstract translation: 公开了互连元件及其制造方法。 互连元件可以包括多个金属导体，多个固体金属凸块和低熔点（LMP）金属层。 固体金属凸起并且远离相应导体的第一方向突出。 每个凸块具有至少一个沿至少一个横向于第一方向的第二方向限定凸块的边缘。 低熔点（LMP）金属层具有连接到各个导体的第一面，并且通过至少一个边缘和与凸块相连的第二面沿第二方向限定。 凸块和LMP层的边缘在第一方向上对齐，并且LMP金属层的熔化温度基本上低于导体。

公开(公告)号：US20090145630A1

公开(公告)日：2009-06-11

申请号：US11719803

申请日：2005-11-18

Applicant: Mitsuhiro Watanabe ,  Kinji Saijo ,  Shinji Ohsawa ,  Kazuo Yoshida ,  Koji Nanbu

Inventor： Mitsuhiro Watanabe ,  Kinji Saijo ,  Shinji Ohsawa ,  Kazuo Yoshida ,  Koji Nanbu

IPC: H05K1/09 ,  H05K1/02 ,  B32B37/02

CPC classification number: H05K3/427 ,  H05K1/0265 ,  H05K1/116 ,  H05K3/062 ,  H05K3/20 ,  H05K3/4658 ,  H05K2201/0352 ,  H05K2201/0355 ,  H05K2201/0361 ,  H05K2201/0376 ,  H05K2201/09509 ,  H05K2201/09736 ,  H05K2203/0361 ,  H05K2203/0384 ,  H05K2203/1476 ,  Y10T156/10

Abstract: To provide a printed wiring board and a method for manufacturing the printed wiring board in which circuit widths of a signal transmission circuit and a power supply circuit or the like, which conventionally require to have greatly different circuit widths, are close to each other as much as possible and substantial miniaturization can be achieved. In order to achieve this object, a printed wiring board obtained by etching a metal-clad laminate including a conductive layer and an insulating layer is employed, in which a first circuit and a second circuit having different thicknesses formed in a same reference plane coexist. In addition, it is characterized in that a thicker circuit of the first circuit or the second circuit has a clad-like configuration in which three layers of a first copper layer/a different kind of metal layer/a second copper layer are sequentially stacked. Further, a manufacture of the printed wiring board is characterized in that a clad composite material in which three layers of a first copper layer/a different kind of metal layer/a second copper layer are sequentially stacked is a start material, and selective etching characteristic between the different kind of metal layer and the copper layer is effectively utilized.

Abstract translation: 为了提供印刷电路板和制造印刷电路板的方法，其中传统上需要具有大大不同的电路宽度的信号传输电路和电源电路等的电路宽度彼此接近 并且可以实现实质的小型化。 为了实现该目的，采用通过蚀刻包括导电层和绝缘层的覆金属层压板获得的印刷布线板，其中形成在相同参考平面中的具有不同厚度的第一电路和第二电路共存。 此外，其特征在于，第一电路或第二电路的较厚电路具有层叠结构，其中第一铜层/不同种类的金属层/第二铜层三层依次层叠。 此外，印刷布线板的制造的特征在于，其中顺序层叠有三层第一铜层/不同种类的金属层/第二铜层的复合材料是起始材料，并且选择性蚀刻特性 在不同种类的金属层和铜层之间有效地利用。

公开(公告)号：US20090115047A1

公开(公告)日：2009-05-07

申请号：US12287380

申请日：2008-10-08

Applicant: Belgacem Haba ,  Vage Oganesian ,  Kimitaka Endo

Inventor： Belgacem Haba ,  Vage Oganesian ,  Kimitaka Endo

IPC: H01L23/522 ,  B32B38/00 ,  C23F1/00 ,  B32B38/10 ,  H01L21/768

CPC classification number: H01L21/486 ,  H01L21/4857 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/16 ,  H01L2224/24226 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107 ,  H05K1/185 ,  H05K3/0038 ,  H05K3/4038 ,  H05K3/4647 ,  H05K3/4652 ,  H05K2201/0355 ,  H05K2201/0361 ,  H05K2201/0382 ,  H05K2201/096 ,  H05K2203/0384 ,  H05K2203/0733 ,  H05K2203/1189 ,  H01L2924/00

Abstract: An interconnect element 130 can include a dielectric layer 116 having a top face 116b and a bottom face 116a remote from the top face, a first metal layer defining a plane extending along the bottom face and a second metal layer extending along the top face. One of the first or second metal layers, or both, can include a plurality of conductive traces 132, 134. A plurality of conductive protrusions 112 can extend upwardly from the plane defined by the first metal layer 102 through the dielectric layer 116. The conductive protrusions 112 can have top surfaces 126 at a first height 115 above the first metal layer 132 which may be more than 50% of a height of the dielectric layer. A plurality of conductive vias 128 can extend from the top surfaces 126 of the protrusions 112 to connect the protrusions 112 with the second metal layer.

Abstract translation: 互连元件130可以包括具有顶面116b和远离顶面的底面116a的介电层116，限定沿着底面延伸的平面的第一金属层和沿着顶面延伸的第二金属层。 第一或第二金属层之一或两者可以包括多个导电迹线132,134。多个导电突起112可以从由第一金属层102限定的平面向上延伸穿过电介质层116.导电 突起112可以具有在第一金属层132上方的第一高度115处的顶表面126，其可以超过介电层的高度的50％。 多个导电通孔128可以从突起112的顶表面126延伸，以将突起112与第二金属层连接。