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公开(公告)号：EP1162569B1
公开(公告)日：2005-12-14
申请号：EP01120744.6
申请日：1998-02-02
Applicant: Giesecke & Devrient GmbH
Inventor： Tarantino, Thomas , HaghiriTehrani, Yahya
IPC: G06K19/077
CPC classification number: G06K19/0775 , G06K19/07749 , H05K1/0268 , H05K1/183 , H05K3/0044 , H05K3/28 , H05K3/305 , H05K3/321 , H05K3/4007 , H05K2201/09836 , H05K2203/0207 , H05K2203/0228
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公开(公告)号：EP1108348A1
公开(公告)日：2001-06-20
申请号：EP99902306.2
申请日：1999-01-15
Applicant: MINNESOTA MINING AND MANUFACTURING COMPANY
Inventor： WINDSCHITL, David J.
IPC: H05K3/40 , H01L23/538
CPC classification number: H01L21/486 , H01L23/49827 , H01L23/4985 , H01L2924/0002 , H05K3/002 , H05K3/388 , H05K3/4076 , H05K2201/0166 , H05K2201/09827 , H05K2201/09836 , H05K2201/09854 , H01L2924/00
Abstract: A flexible circuit includes a flexible non-conductive substrate (12) having a first surface and a second surface. A first electrically conductive trace (18) is provided on the first surface and a second electrically conductive trace (20) is provided on the second surface. A passage (22) extends through the substrate from an end of the first trace to an end of the second trace. The passage includes a beveled opening (26) of a first size formed in the first side and axially aligned with a second beveled opening (28) of the first size formed in the second side. The first and second openings are interconnected by an aperture axially aligned therewith and being of a second size less than the first size. An electrically conductive surface is provided on the passage for electrically interconnecting the first trace and the second trace.
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公开(公告)号：EP0956538A1
公开(公告)日：1999-11-17
申请号：EP98908041.0
申请日：1998-02-02
Applicant: Giesecke & Devrient GmbH
Inventor： TARANTINO, Thomas , HAGHIRI-TEHRANI, Yahya
CPC classification number: G06K19/0775 , G06K19/07749 , H05K1/0268 , H05K1/183 , H05K3/0044 , H05K3/28 , H05K3/305 , H05K3/321 , H05K3/4007 , H05K2201/09836 , H05K2203/0207 , H05K2203/0228
Abstract: The present invention pertains to a data medium in the form of a chipcard comprising the card body (1) fitted with an antenna (3), a chip module (2) containing an integrated circuit (10) and located in a recess (5) provided in the card body (1). The electric connection between the antenna (3) and the chip module (2) passes through lows (11) in the antenna (3) connections (4). When manufacturing the inventive data medium, a cavity (5) is engineered inside the body card (1) in which the antenna is at least partially embedded. The chip module (2) is placed into said cavity (5) and glued to the card body, for example with a thermoactivable glue (6), thereby establishing an electric connection between the chip module (2) and the antenna (3) inasmuch, for instance, as a conductive glue is used for anticipated application to the free antenna (3) connections (4). In the preferred embodiment the chip removal is carried out so as to form an oblique cutout.
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公开(公告)号：JP2015041776A
公开(公告)日：2015-03-02
申请号：JP2014167162
申请日：2014-08-20
Applicant: サムソン エレクトロ−メカニックス カンパニーリミテッド. , Samsung Electro-Mechanics Co Ltd , サムソン エレクトロ−メカニックス カンパニーリミテッド.
Inventor： KIM JONG KYUNG
CPC classification number: H05K1/0265 , H05K1/115 , H05K2201/09536 , H05K2201/09636 , H05K2201/09836 , H05K2201/09854
Abstract: 【課題】既存のビアに比べて電流の流れを改善することができるとともに、設計を効果的に行うことができるだけでなく、熱放出効果を高めることができる多層プリント回路基板を提供する。【解決手段】本発明の多層プリント回路基板100は、多数の回路層101と、多数の回路層101間にそれぞれ形成された絶縁層102と、絶縁層102および回路層101を貫通し、多数の回路層101を電気的に接続するビアと、を含み、前記ビアは、第1ビア200および第2ビア300を有し、第2ビア300は、第1ビア200より大きい直径を有する大径ビアであるものである。【選択図】図1
Abstract translation: 要解决的问题：提供一种能够与现有的转子相比能够改善电流的多层印刷电路板，并且不仅能够有效地进行设计，而且能够增强散热效果。解决方案：多层印刷电路板100 包括：许多电路层101; 绝缘层102分别形成在多个电路层101之间; 以及穿过绝缘层102和电路层101并且电连接多个电路层101的转子。该转子具有第一转子200和第二转子300，并且第二转子300是具有较大直径的大直径转子 直径比第一转子200。
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公开(公告)号：JPWO2011048862A1
公开(公告)日：2013-03-07
申请号：JP2011518611
申请日：2010-08-04
Applicant: 株式会社フジクラ
IPC: H05K1/18 , H01L23/473 , H01L25/065 , H01L25/07 , H01L25/18 , H05K1/11 , H05K3/40
CPC classification number: H01L21/486 , H01L23/3107 , H01L23/49827 , H01L25/0657 , H01L2224/16225 , H01L2225/06517 , H01L2225/06572 , H01L2225/06589 , H01L2924/09701 , H01L2924/1461 , H05K1/113 , H05K3/101 , H05K2201/09263 , H05K2201/09836 , H05K2201/10545 , Y10T29/49165 , H01L2924/00
Abstract: 基板と、この基板の一方の主面である第1主面から他方の主面である第2主面に向けて前記基板を貫通する複数の貫通孔の内部に形成された複数の貫通配線とを有する貫通配線基板と;複数の電極を有してかつ、これら電極が前記第1主面に対向するように配置された第1のデバイスと;この第1のデバイスの各電極の配置とは配置が異なる複数の電極を有してかつ、これら電極が前記第2主面に対向するように配置された第2のデバイスと;を備えたデバイス実装構造であって、前記各貫通配線は、前記第1主面の、前記第1のデバイスの電極に対応する位置に設けられた第1の導通部と、前記第2主面の、前記第2のデバイスの電極に対応する位置に設けられた第2の導通部とを有し、前記第1のデバイスの各電極は、前記第1の導通部に電気的に接続され、前記第2のデバイスの各電極は、前記第2の導通部に電気的に接続されており、前記各貫通配線は、前記第1主面及び前記第2主面のうちの少なくとも一方から垂直に延びる直線部を有する。
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Patent Agency Ranking
公开(公告)号：JP5085787B2
公开(公告)日：2012-11-28
申请号：JP2011518611
申请日：2010-08-04
Applicant: 株式会社フジクラ
IPC: H05K1/18 , H01L23/473 , H01L25/065 , H01L25/07 , H01L25/18 , H05K1/11 , H05K3/40
CPC classification number: H01L21/486 , H01L23/3107 , H01L23/49827 , H01L25/0657 , H01L2224/16225 , H01L2225/06517 , H01L2225/06572 , H01L2225/06589 , H01L2924/09701 , H01L2924/1461 , H05K1/113 , H05K3/101 , H05K2201/09263 , H05K2201/09836 , H05K2201/10545 , Y10T29/49165 , H01L2924/00
Abstract: Provided is a device packaging structure including: an interposer substrate including a substrate, and a plurality of through-hole interconnections formed inside a plurality of through-holes passing through the substrate from a first main surface toward a second main surface, the first main surface being one main surface of the substrate, the second main surface being the other main surface thereof; a first device which includes a plurality of electrodes and is arranged so that these electrodes face the first main surface; and a second device which includes a plurality of electrodes of which an arrangement is different from an arrangement of each of the electrodes of the first device, and is arranged so that these electrodes face the second main surface. Each of the through-hole interconnections includes a first conductive portion, provided at a position corresponding to the electrode of the first device, on the first main surface, and a second conductive portion, provided at a position corresponding to the electrode of the second device, on the second main surface, each electrode of the first device is electrically connected to the first conductive portion, each of the electrodes of the second device is electrically connected to the second conductive portion, and each of the through-hole interconnections includes a linear portion vertically extending from at least one of the first main surface and the second main surface.
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公开(公告)号：JPWO2009028463A1
公开(公告)日：2010-12-02
申请号：JP2009530110
申请日：2008-08-25
Applicant: 日本電気株式会社
CPC classification number: H01L23/49816 , H01G2/06 , H01L23/49805 , H01L23/50 , H01L2924/0002 , H01L2924/15311 , H05K1/0231 , H05K1/141 , H05K1/145 , H05K3/3436 , H05K3/3442 , H05K3/403 , H05K2201/09181 , H05K2201/09836 , H05K2201/10378 , H05K2201/10636 , H05K2201/2036 , Y02P70/611 , Y02P70/613 , H01L2924/00
Abstract: 【課題】ロウ付けされた半導体装置とプリント配線基板との間隙幅を一定とする際に、ロウの吸い寄せによる接続不良の回避を実現しうるスペーサおよびその製造方法の提供。【解決手段】電気絶縁性のベース基材と、少なくとも1個のロウ誘導端子とを有するスペーサであって、前記ベース基材の表面が、底面と、上面と、少なくとも1面の側面とで構成され、前記底面と前記上面とが、互いに接しない面であり、前記側面が、前記底面及び前記上面の一方又は両方に接する面であり、前記ロウ誘導端子が、前記底面の一部と、前記上面の一部と、前記側面の一部又は全部とを被覆しており、前記ロウ誘導端子の前記側面を被覆している部分の表面であるロウ誘導面が、前記底面に対して非垂直である、スペーサ。【選択図】図1
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公开(公告)号：JP2008244234A
公开(公告)日：2008-10-09
申请号：JP2007084112
申请日：2007-03-28
Applicant: Sanyo Electric Co Ltd , Sanyo Energy Tottori Co Ltd , 三洋エナジー鳥取株式会社 , 三洋電機株式会社
Inventor： YAMASHITA TETSUYA , OZAKI HIROTOSHI , MORIMOTO AKIKO
CPC classification number: H01R12/7082 , H05K1/182 , H05K3/3421 , H05K2201/09836 , H05K2201/10037 , H05K2201/10484 , H05K2201/10651 , H05K2201/10856 , H05K2203/0195 , H05K2203/082
Abstract: PROBLEM TO BE SOLVED: To solve the problem wherein solder is hidden behind an electrical element in a conventional flat electric element, it is difficult to detach a defective element and rework is difficult as a result, while the defective element is sometimes detached by manual work using a soldering iron, in order to detach a defective mounted element from a printed board and exchange it, after mounting the printed board.
SOLUTION: A coin-shaped battery 20 with leads is provided with bend parts 22a and 23a by bending the respective two leads 22 and 23 in a direction of crossing main surfaces 21a and 21b, in a region farther inside than the edge of the main surfaces 21a and 21b of a coin-shaped battery 21.
COPYRIGHT: (C)2009,JPO&INPITAbstract translation: 要解决的问题为了解决在传统的扁平电气元件中将电极隐藏在电气元件后面的问题，难以拆卸有缺陷的元件，结果难以进行返工，而有缺陷的元件有时被分离 通过使用烙铁进行人工操作，以便在安装印刷电路板之后，从印刷电路板上拆下有缺陷的安装元件并进行更换。 解决方案：具有引线的硬币形电池20通过在与主表面21a和21b交叉的方向上相对于两个引线22和23的方向在相对于第二引线22和23的边缘 硬币形电池21的主表面21a和21b。版权所有（C）2009，JPO＆INPIT
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公开(公告)号：JP2005191518A
公开(公告)日：2005-07-14
申请号：JP2004136399
申请日：2004-04-30
Applicant: Samsung Electro Mech Co Ltd , 三星電機株式会社
Inventor： HAN KIM , CHOI BONG-KYU , DAE-CHEOL SEO , HEUNG-KYU KIM , PARK SANG-KAB
CPC classification number: H05K1/115 , H01L23/49827 , H01L23/49833 , H01L2224/16 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/01068 , H01L2924/01078 , H01L2924/09701 , H01L2924/15311 , H05K3/4602 , H05K2201/09836 , H01L2924/00
Abstract: PROBLEM TO BE SOLVED: To provide a via contact structure capable of minimizing a loss to high frequency. SOLUTION: In a printed circuit board or a package forming an insulating layer and a large number of circuit layers, a skew via is formed so as to skew to the circuit layer surface and form an obtuse angle to an electric power and a signal line. This is a signal transmitting device using the skew via formed so as to skew to the circuit layer surface and form the obtuse angle to the signal line, in a signal transmitting device between a first and second conductive wires locating on independent first and second circuit layers. The problem of signal failure due to high frequency generated by the high speed of a digital signal can be solved. By a substrate such as the IC package or the PCB having a via contact structure, the high frequency loss in the via contact can be reduced and the signal transmission in a future high frequency band can be improved. COPYRIGHT: (C)2005,JPO&NCIPI
Abstract translation: 要解决的问题：提供能够将损失最小化到高频率的通孔接触结构。 解决方案：在印刷电路板或形成绝缘层和大量电路层的封装中，形成偏斜通道以使其与电路层表面倾斜并形成与电力的钝角，并且 信号线。 这是使用偏斜通道的信号发送装置，其形成为在电路层表面上倾斜并且形成与信号线成钝角的信号传输装置，位于独立的第一和第二电路层之间的第一和第二导线之间的信号传输装置 。 可以解决由数字信号的高速产生的高频引起的信号故障的问题。 通过诸如IC封装的基板或具有通孔接触结构的PCB，可以减小通孔接点中的高频损耗，并且可以提高未来高频带中的信号传输。 版权所有（C）2005，JPO＆NCIPI
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公开(公告)号：US09699919B2
公开(公告)日：2017-07-04
申请号：US15041104
申请日：2016-02-11
Applicant: Yazaki Corporation
Inventor： Akemi Maebashi , Pharima Akanitsuk
CPC classification number: H05K3/3447 , H05K2201/09818 , H05K2201/09827 , H05K2201/09836 , H05K2201/09845 , H05K2201/10272
Abstract: An electronic component unit and a wire harness are provided with a bus bar plate. The bus bar plate is provided with a metallic bus bar that is built in a resin material, and including a through-hole in which a terminal of a relay mounted on a mounting surface is soldered. The through-hole is provided with a bus bar through-hole which penetrates the bus bar, and a resin material through-hole which penetrates the resin material and is formed to be larger than the bus bar through-hole to expose the surface of the bus bar. When an inner diameter of the bus bar through-hole is defined as r and an inner diameter of the resin material through-hole is defined as R, 1.5r≦R is satisfied.
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