公开(公告)号：WO2016167848A1

公开(公告)日：2016-10-20

申请号：PCT/US2016/012133

申请日：2016-01-05

Applicant: THE GOVERNMENT OF THE UNITED STATES OF AMERICA, AS REPRESENTED BY THE SECRETARY OF THE NAVY ,  MEYER, David, J. ,  DOWNEY, Brian, P.

Inventor： MEYER, David, J. ,  DOWNEY, Brian, P.

IPC: B81C1/00 ,  B81B7/00 ,  B81B7/02 ,  H01L27/04

CPC classification number: B81C1/00539 ,  B81C1/00936 ,  B81C2201/0107 ,  B81C2201/0132 ,  B81C2201/0143 ,  B81C2201/0159 ,  B81C2201/0177

Abstract: A process for fabricating a suspended microelectromechanical system (MEMS) structure comprising epitaxial semiconductor functional layers that are partially or completely suspended over a substrate. A sacrificial release layer and a functional device layer are formed on a substrate. The functional device layer is etched to form windows in the functional device layer defining an outline of a suspended MEMS device to be formed from the functional device layer. The sacrificial release layer is then etched with a selective release etchant to remove the sacrificial release layer underneath the functional layer in the area defined by the windows to form the suspended MEMS structure.

Abstract translation: 一种用于制造悬浮微机电系统（MEMS）结构的方法，其包括部分或完全悬浮在衬底上的外延半导体功能层。 在基板上形成牺牲剥离层和功能元件层。 功能器件层被蚀刻以在功能器件层中形成窗口，其限定要由功能器件层形成的悬置的MEMS器件的轮廓。 然后用选择性释放蚀刻剂蚀刻牺牲剥离层，以去除由窗口限定的区域中的功能层下方的牺牲剥离层，以形成悬浮的MEMS结构。

公开(公告)号：WO2011088217A3

公开(公告)日：2012-02-02

申请号：PCT/US2011021142

申请日：2011-01-13

Applicant: AEROSPACE CORP ,  HELVAJIAN HENRY

Inventor： HELVAJIAN HENRY

IPC: B81B7/00

CPC classification number: H05K7/02 ,  B01J19/0093 ,  B01J2219/00824 ,  B01J2219/00835 ,  B01J2219/00853 ,  B01J2219/00941 ,  B01J2219/00948 ,  B01L3/502707 ,  B01L2300/0654 ,  B01L2300/0681 ,  B01L2300/0867 ,  B01L2300/0874 ,  B81B7/0077 ,  B81B2207/07 ,  B81B2207/092 ,  B81B2207/095 ,  B81B2207/096 ,  B81C99/0095 ,  B81C2201/0143 ,  B81C2201/0159 ,  G02B2006/12035 ,  G02B2006/12171 ,  H01P3/121 ,  H05K1/0306 ,  H05K1/16 ,  H05K1/162 ,  H05K1/165 ,  H05K3/0023 ,  H05K3/101 ,  Y10T29/42 ,  Y10T29/49002 ,  Y10T29/49005 ,  Y10T29/4908

Abstract: A photostructurable ceramic is processed using photostructuring process steps for embedding devices within a photostructurable ceramic volume, the devices may include one or more of chemical, mechanical, electronic, electromagnetic, optical, and acoustic devices, all made in part by creating device material within the ceramic or by disposing a device material through surface ports of the ceramic volume, with the devices being interconnected using internal connections and surface interfaces.

Abstract translation: 使用用于将装置嵌入可光可陶瓷陶瓷体积内的光学结构化工艺步骤来处理可光致结构陶瓷，所述装置可以包括化学，机械，电子，电磁，光学和声学装置中的一种或多种，​​所有这些都部分地通过在 陶瓷或通过陶瓷体的表面端口设置装置材料，其中装置通过内部连接和表面接口相互连接。

公开(公告)号：WO2010002045A1

公开(公告)日：2010-01-07

申请号：PCT/KR2008/003871

申请日：2008-07-01

Applicant: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY ,  LEE, SEUNG SEOB ,  LEE, SEOK WOO ,  LEE, JUNG A

Inventor： LEE, SEUNG SEOB ,  LEE, SEOK WOO ,  LEE, JUNG A

IPC: B82B3/00 ,  G03F7/20

CPC classification number: G03F7/00 ,  B81B2203/0361 ,  B81B2207/056 ,  B81C1/00111 ,  B81C2201/0159 ,  G03F7/2014

Abstract: A method for producing a high-aspect-ratio microstructure includes: a photomask attachment step of attaching a photomask with a pattern groove to one surface of a transparent substrate; a photoresist attachment step of attaching a negative photoresist to one surface of the photomask; an exposure step of irradiating light toward the opposite surface of the transparent substrate from the photomask to cure a portion of the negative photoresist with the light irradiated on the negative photoresist through the pattern groove; and a developing step of removing an uncured portion of the negative photoresist while leaving the cured portion of the negative photoresist as a microstructure. With this method, it is possible to produce the high-aspect-ratio microstructure in an easy and cost-effective manner.

Abstract translation: 一种制造高纵横比微结构的方法包括：光掩模附着步骤，其将具有图案凹槽的光掩模附着在透明基板的一个表面上; 将负性光致抗蚀剂附着到光掩模的一个表面的光致抗蚀剂附着步骤; 曝光步骤，从所述光掩模向所述透明基板的相对表面照射光，以通过所述图案凹槽照射在所述负性光致抗蚀剂上的光来固化所述负性光致抗蚀剂的一部分; 以及显影步骤，除去负性光致抗蚀剂的未固化部分，同时留下负性光致抗蚀剂的固化部分作为微结构。 通过这种方法，可以以简单且成本有效的方式制造高纵横比微结构。

公开(公告)号：WO2007050704A2

公开(公告)日：2007-05-03

申请号：PCT/US2006/041668

申请日：2006-10-25

Applicant: MASSACHUSETTS INSTITUTE OF TECHNOLOGY ,  DOYLE, Patrick, S. ,  PREGIBON, Daniel, C. ,  DENDUKURI, Dhananjay

Inventor： DOYLE, Patrick, S. ,  PREGIBON, Daniel, C. ,  DENDUKURI, Dhananjay

IPC: G03F7/20

CPC classification number: G03F7/2012 ,  B81C99/0095 ,  B81C2201/0159 ,  G03F7/2035

Abstract: In a method for synthesizing polymeric microstructures, a monomer stream is flowed, at a selected flow rate, through a fluidic channel. At least one shaped pulse of illumination is projected to the monomer stream, defining in the monomer stream a shape of at least one microstructure corresponding to the illumination pulse shape while polymerizing that microstructure shape in the monomer stream by the illumination pulse.

Abstract translation: 在用于合成聚合物微结构的方法中，单体流以选定的流速通过流体通道流动。 至少一个成形的照射脉冲投射到单体流中，在单体流中限定对应于照射脉冲形状的至少一个微结构的形状，同时通过照射脉冲聚合单体流中的微结构形状。

公开(公告)号：WO2006132664A3

公开(公告)日：2007-04-05

申请号：PCT/US2005036812

申请日：2005-10-14

Applicant: UNIV ILLINOIS ,  NUZZO RALPH G ,  CHILDS WILLIAM R ,  MOTALA MICHAEL J ,  LEE KEON JAE

Inventor： NUZZO RALPH G ,  CHILDS WILLIAM R ,  MOTALA MICHAEL J ,  LEE KEON JAE

IPC: G03F7/00

CPC classification number: G03F7/0002 ,  B81C1/0038 ,  B81C2201/0159 ,  B81C2201/0191 ,  B81C2203/038 ,  B82Y10/00 ,  B82Y40/00 ,  G03F7/34 ,  G03F7/346

Abstract: A method of making a microstructure includes selectively activating a portion of a surface of a silicon-containing elastomer, contacting the activated portion with a substance, and bonding the activated portion and the substance, such that the activated portion of the surface and the substance in contact with the activated portion are irreversibly attached. The selective activation may be accomplished by positioning a mask on the surface of the silicon-containing elastomer, and irradiating the exposed portion with UV radiation.

Abstract translation: 制造微结构的方法包括选择性地激活含硅弹性体的表面的一部分，使活化部分与物质接触，并且将活化部分和物质接合，使得表面的活化部分和物质在 与活化部分的接触不可逆地附着。 选择性活化可以通过将掩模定位在含硅弹性体的表面上，并用紫外线辐射照射暴露部分来实现。

公开(公告)号：WO2004068591A1

公开(公告)日：2004-08-12

申请号：PCT/JP2003/000859

申请日：2003-01-29

Applicant: 三菱電機株式会社 ,  奥村 美香 ,  堀川 牧夫 ,  佐藤 公敏

Inventor： 奥村 美香 ,  堀川 牧夫 ,  佐藤 公敏

IPC: H01L29/84

CPC classification number: B81C1/00095 ,  B81B2201/0235 ,  B81C2201/0109 ,  B81C2201/0159 ,  G01P15/0802 ,  G01P15/125 ,  H01L29/84

Abstract: 本発明は半導体基板、例えば加速度センサを搭載するシリコン基板と接続される電極を形成するに際し、フォトレジストが覆う段差を低減する技術を提供することを目的とする。そして上記目的を達成するために、犠牲層（４）や半導体膜（５０）、固定電極（５１）を形成する前に、電極（９０）を形成するための開口（８０）を形成する。よって厚いフォトレジストを必要としない。

Abstract translation: 一种降低在与半导体衬底连接的电极形成时的光致抗蚀剂的台阶覆盖率的技术。 用于安装加速度传感器的硅衬底。 在牺牲层（4），半导体膜（50）或固定电极（51）形成之前形成用于形成电极（90）的开口（80）。 因此不需要厚的光致抗蚀剂。

公开(公告)号：WO0233458A3

公开(公告)日：2003-08-14

申请号：PCT/US0132512

申请日：2001-10-17

Applicant: AXSUN TECH INC ,  MILLER MICHAEL F ,  LE MINH VAN ,  COOK CHRISTOPHER C ,  FLANDERS DALE C ,  NAGLE STEVEN F

Inventor： MILLER MICHAEL F ,  LE MINH VAN ,  COOK CHRISTOPHER C ,  FLANDERS DALE C ,  NAGLE STEVEN F

IPC: B81B3/00 ,  G02B26/00 ,  G02B1/10

CPC classification number: B81B3/0083 ,  B81B2201/042 ,  B81B2201/047 ,  B81C1/0038 ,  B81C2201/0159 ,  B81C2201/053 ,  B81C2201/056 ,  G02B26/001

Abstract: A process for patterning dielectric layers of the type typically found in optical coatings in the context of MEMS manufacturing is disclosed. A dielectric coating is deposited over a device layer, which has or will be released, and patterned using a mask layer. In one example, the coating is etched using the mask layer as a protection layer. In another example, a lift-off process is shown. The primary advantage of photolithographic patterning of the dielectric layers in optical MEMS devices is that higher levels of consistency can be achieved in fabrication, such as size, location, and residual material stress.

Abstract translation: 公开了一种用于在MEMS制造的上下文中通常在光学涂层中发现的类型的介电层图案的工艺。 电介质涂层沉积在器件层上，器件层已经或将被释放，并使用掩模层进行图案化。 在一个实例中，使用掩模层作为保护层来蚀刻涂层。 在另一示例中，示出了剥离过程。 光学MEMS器件中电介质层的光刻图案的主要优点是可以在诸如尺寸，位置和残余材料应力的制造中实现更高水平的稠度。

公开(公告)号：TWI389840B

公开(公告)日：2013-03-21

申请号：TW094129856

申请日：2005-08-31

Applicant: 美國伊利諾大學理事會 ,  THE BOARD OF TRUSTEES OF THE UNIVERSITY OF ILLINOIS

Inventor： 勞弗G 努茲若 ,  NUZZO, RALPH G. ,  威廉R 喬爾茲 ,  CHILDS, WILLIAM R. ,  麥克J 莫塔拉 ,  MOTALA, MICHAEL J. ,  李建宰 ,  LEE, KEON JAE

IPC: B81C1/00 ,  G03F7/00

CPC classification number: G03F7/0002 ,  B81C1/0038 ,  B81C2201/0159 ,  B81C2201/0191 ,  B81C2203/038 ,  B82Y10/00 ,  B82Y40/00 ,  G03F7/34 ,  G03F7/346

公开(公告)号：US20240351865A1

公开(公告)日：2024-10-24

申请号：US18622059

申请日：2024-03-29

Applicant: Xintec Inc.

Inventor： Jiun-Yen LAI ,  Wei-Luen SUEN ,  Ming-Chung CHUNG ,  Chih-Wei LIU

IPC: B81C1/00

CPC classification number: B81C1/00825 ,  B81C2201/013 ,  B81C2201/0143 ,  B81C2201/0146 ,  B81C2201/0159

Abstract: A manufacturing method of a micro electro mechanical system (MEMS) device includes forming a buffer protection layer on a semiconductor structure, wherein the semiconductor structure includes a wafer, a MEMS membrane, and an isolation layer between the wafer and the MEMS membrane, and the buffer protection layer is located in a slit of the MEMS membrane and on a surface of the MEMS membrane facing away from the isolation layer; etching the wafer to form a cavity such that a portion of the isolation layer is exposed though the cavity; etching the portion of the isolation layer; and removing the buffer protection layer.

公开(公告)号：US20240208801A1

公开(公告)日：2024-06-27

申请号：US17747879

申请日：2022-05-18

Applicant: UPBEAT TECHNOLOGY Co., Ltd

Inventor： Hsi-Wen TUNG ,  Hsien-Lung HO

IPC: B81B3/00 ,  B81C1/00

CPC classification number: B81B3/0021 ,  B81C1/00182 ,  B81B2201/0257 ,  B81B2201/0285 ,  B81B2203/0315 ,  B81B2203/0353 ,  B81C2201/013 ,  B81C2201/0159 ,  B81C2201/053

Abstract: A MEM vibration sensor includes a substrate and a sensing-device. The substrate includes a first supporting-portion and a cavity. The sensing-device includes a first sensing-unit, a second sensing-unit, a first metal pad and a second metal pad. The first sensing-unit includes a second supporting-portion and a vibrating-portion. The second supporting-portion is located on the first supporting-portion and is connected to the first supporting-portion via a first dielectric material. The vibrating-portion is located on the cavity, and is connected with the second supporting-portion through an elastic connecting-portion. The second sensing-unit is located on the first sensing-unit and includes a sensing-portion and a third supporting-portion. The sensing-portion is located on the vibrating-portion and has a gap with the vibrating-portion. The third supporting-portion is located on the second supporting-portion, is connected to the sensing-portion, and is connected to the second supporting-portion through a second dielectric material.